[PATCH] drm/i915/gvt: Reduce rcs mocs switch latency

[Du, Changbin]

On Sun, Oct 29, 2017 at 11:32:04PM -0700, Wang, Zhi A wrote:
> LGTM.
> 
> BTW: You can also remove forcewake get/put in handle_tlb_pending_event(). It's not in the hot path but it looks ugly...
>
yes, they need clean up now.

> Thanks,
> Zhi.
> 
> -----Original Message-----
> From: intel-gvt-dev [mailto:intel-gvt-dev-bounces at lists.freedesktop.org] On Behalf Of changbin.du at intel.com
> Sent: Monday, October 30, 2017 8:19 AM
> To: intel-gvt-dev at lists.freedesktop.org
> Cc: Du, Changbin <changbin.du at intel.com>
> Subject: [PATCH] drm/i915/gvt: Reduce rcs mocs switch latency
> 
> From: Changbin Du <changbin.du at intel.com>
> 
> Use I915_WRITE_FW instead of I915_WRITE to reduce overhead.
> The overall mmio switch latency lowers from ~600us to ~180us.
> 
> Signed-off-by: Changbin Du <changbin.du at intel.com>
> ---
>  drivers/gpu/drm/i915/gvt/render.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/gvt/render.c b/drivers/gpu/drm/i915/gvt/render.c
> index e16c355..0672178 100644
> --- a/drivers/gpu/drm/i915/gvt/render.c
> +++ b/drivers/gpu/drm/i915/gvt/render.c
> @@ -209,7 +209,7 @@ static void load_mocs(struct intel_vgpu *vgpu, int ring_id)
>  	offset.reg = regs[ring_id];
>  	for (i = 0; i < 64; i++) {
>  		gen9_render_mocs[ring_id][i] = I915_READ_FW(offset);
> -		I915_WRITE(offset, vgpu_vreg(vgpu, offset));
> +		I915_WRITE_FW(offset, vgpu_vreg(vgpu, offset));
>  		offset.reg += 4;
>  	}
>  
> -- 
> 2.7.4
> 
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-- 
Thanks,
Changbin Du
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