[Intel-xe] [PATCH 11/15] drm/xe/xe2: Add MOCS table

[Lucas De Marchi]

On Fri, Aug 11, 2023 at 09:21:06AM -0700, Matt Roper wrote:
>On Fri, Aug 11, 2023 at 09:06:14AM -0700, Lucas De Marchi wrote:
>> From: Balasubramani Vivekanandan <balasubramani.vivekanandan at intel.com>
>>
>> Additional minor change to remove L4_2_RESERVED, which will never be
>> required.
>>
>> Bspec: 71582
>> Cc: Matt Roper <matthew.d.roper at intel.com>
>> Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan at intel.com>
>> Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
>> ---
>>  drivers/gpu/drm/xe/xe_mocs.c | 29 +++++++++++++++++++++++------
>>  1 file changed, 23 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_mocs.c b/drivers/gpu/drm/xe/xe_mocs.c
>> index c9653978fc9f5..d779ab8466d32 100644
>> --- a/drivers/gpu/drm/xe/xe_mocs.c
>> +++ b/drivers/gpu/drm/xe/xe_mocs.c
>> @@ -62,13 +62,15 @@ struct xe_mocs_info {
>>  #define L3_LKUP(value)		((value) << 7)
>>
>>  /* Defines for the tables (GLOB_MOCS_0 - GLOB_MOCS_16) */
>> -#define _L4_CACHEABILITY	REG_GENMASK(3, 2)
>> -#define IG_PAT			REG_BIT(8)
>> +#define IG_PAT				REG_BIT(8)
>> +#define GLOB_L3_CACHEABILITY_MASK	REG_GENMASK(5, 4)
>> +#define L4_CACHEABILITY_MASK		REG_GENMASK(3, 2)
>
>It looks a little bit strange to have "GLOB_" on the L3 but not on the
>L4; should we make these two names consistent?  The symbol names
>recommended on bspec page 65553 are "L{3,4}_CACHE_POLICY" so maybe we
>should just use those names (with "_MASK" on the end) since that won't
>clash with the old LNCF define?

yeah, that sounds good. I will add the rename on next version.


>
>Anyway, it's up to you if you think it's worth renaming anything or
>not.  All the values look correct so
>
>Reviewed-by: Matt Roper <matthew.d.roper at intel.com>

thanks

Lucas De Marchi