[Intel-xe] [PATCH v2 01/10] fixup! 57f0bc550693ad29726bf2a71d05af0dc2d0a542
Lucas De Marchi
lucas.demarchi at intel.com
Wed Jul 26 16:06:59 UTC 2023
Remove leftover defines. This is a fixup to the fixup, since that commit
may eventually be promoted to a proper commit to avoid the need to
squash it below the commits it depends upon.
NOTE TO MAINTAINER DOING THE REBASE: this is about this commit:
57f0bc550693 o fixup! drm/xe/display: Implement display support
Reviewed-by: Matt Roper <matthew.d.roper at intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
---
drivers/gpu/drm/xe/regs/xe_regs.h | 17 -----------------
1 file changed, 17 deletions(-)
diff --git a/drivers/gpu/drm/xe/regs/xe_regs.h b/drivers/gpu/drm/xe/regs/xe_regs.h
index 8be616a1bd51..dbf572d11af0 100644
--- a/drivers/gpu/drm/xe/regs/xe_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_regs.h
@@ -56,23 +56,6 @@
#define MTL_MPE_FREQUENCY XE_REG(0x13802c)
#define MTL_RPE_MASK REG_GENMASK(8, 0)
-#define TRANSCODER_A_OFFSET 0x60000
-#define TRANSCODER_B_OFFSET 0x61000
-#define TRANSCODER_C_OFFSET 0x62000
-#define TRANSCODER_D_OFFSET 0x63000
-#define TRANSCODER_DSI0_OFFSET 0x6b000
-#define TRANSCODER_DSI1_OFFSET 0x6b800
-#define PIPE_A_OFFSET 0x70000
-#define PIPE_B_OFFSET 0x71000
-#define PIPE_C_OFFSET 0x72000
-#define PIPE_D_OFFSET 0x73000
-#define PIPE_DSI0_OFFSET 0x7b000
-#define PIPE_DSI1_OFFSET 0x7b800
-#define CURSOR_A_OFFSET 0x70080
-#define CURSOR_B_OFFSET 0x71080
-#define CURSOR_C_OFFSET 0x72080
-#define CURSOR_D_OFFSET 0x73080
-
#define SOFTWARE_FLAGS_SPR33 XE_REG(0x4f084)
#define PCU_IRQ_OFFSET 0x444e0
--
2.40.1
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