[Intel-xe] [PATCH v4 28/31] drm/xe: Allow GT looping and lookup on standalone media
Gustavo Sousa
gustavo.sousa at intel.com
Thu Jun 1 15:15:30 UTC 2023
Quoting Matt Roper (2023-05-31 21:04:00-03:00)
>Allow xe_device_get_gt() and for_each_gt() to operate as expected on
>platforms with standalone media.
>
>FIXME: We need to figure out a consistent ID scheme for GTs. This patch
>keeps the pre-existing behavior of 0/1 being the GT IDs for both PVC
>(multi-tile) and MTL (multi-GT), but depending on the direction we
>decide to go with uapi, we may change this in the future (e.g., to
>return 0/1 on PVC and 0/2 on MTL). Or if we decide we only need to
>expose tiles to userspace and not GTs, we may not even need ID numbers
>for the GTs anymore.
>
>v2:
> - Restructure a bit to make the assertions more clear.
> - Clarify in commit message that the goal here is to preserve existing
> behavior; UAPI-visible changes may be introduced in the future once
> we settle on what we really want.
>v3:
> - Store total GT count in xe_device for ease of lookup. (Brian)
> - s/(id__++)/(id__)++/ (Gustavo)
>
>Cc: Lucas De Marchi <lucas.demarchi at intel.com>
>Cc: Gustavo Sousa <gustavo.sousa at intel.com>
>Cc: Brian Welty <brian.welty at intel.com>
>Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
Regarding s/(id__++)/(id__)++/,
Acked-by: Gustavo Sousa <gustavo.sousa at intel.com>
>---
> drivers/gpu/drm/xe/xe_device.h | 40 +++++++++++++++++++++++-----
> drivers/gpu/drm/xe/xe_device_types.h | 2 ++
> drivers/gpu/drm/xe/xe_pci.c | 6 ++++-
> 3 files changed, 41 insertions(+), 7 deletions(-)
>
>diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
>index f2d8479f6ff6..779f71d066e6 100644
>--- a/drivers/gpu/drm/xe/xe_device.h
>+++ b/drivers/gpu/drm/xe/xe_device.h
>@@ -53,18 +53,42 @@ static inline struct xe_tile *xe_device_get_root_tile(struct xe_device *xe)
> return &xe->tiles[0];
> }
>
>+#define XE_MAX_GT_PER_TILE 2
>+
>+static inline struct xe_gt *xe_tile_get_gt(struct xe_tile *tile, u8 gt_id)
>+{
>+ if (drm_WARN_ON(&tile_to_xe(tile)->drm, gt_id > XE_MAX_GT_PER_TILE))
>+ gt_id = 0;
>+
>+ return gt_id ? tile->media_gt : tile->primary_gt;
>+}
>+
> static inline struct xe_gt *xe_device_get_gt(struct xe_device *xe, u8 gt_id)
> {
>+ struct xe_tile *root_tile = xe_device_get_root_tile(xe);
> struct xe_gt *gt;
>
>- XE_BUG_ON(gt_id > XE_MAX_TILES_PER_DEVICE);
>+ /*
>+ * FIXME: This only works for now because multi-tile and standalone
>+ * media are mutually exclusive on the platforms we have today.
>+ *
>+ * id => GT mapping may change once we settle on how we want to handle
>+ * our UAPI.
>+ */
>+ if (MEDIA_VER(xe) >= 13) {
>+ gt = xe_tile_get_gt(root_tile, gt_id);
>+ } else {
>+ if (drm_WARN_ON(&xe->drm, gt_id > XE_MAX_TILES_PER_DEVICE))
>+ gt_id = 0;
>
>- gt = xe->tiles[gt_id].primary_gt;
>- if (drm_WARN_ON(&xe->drm, !gt))
>+ gt = xe->tiles[gt_id].primary_gt;
>+ }
>+
>+ if (!gt)
> return NULL;
>
>- XE_BUG_ON(gt->info.id != gt_id);
>- XE_BUG_ON(gt->info.type == XE_GT_TYPE_UNINITIALIZED);
>+ drm_WARN_ON(&xe->drm, gt->info.id != gt_id);
>+ drm_WARN_ON(&xe->drm, gt->info.type == XE_GT_TYPE_UNINITIALIZED);
>
> return gt;
> }
>@@ -100,8 +124,12 @@ static inline void xe_device_guc_submission_disable(struct xe_device *xe)
> for ((id__) = 0; (id__) < (xe__)->info.tile_count; (id__)++) \
> for_each_if ((tile__) = &(xe__)->tiles[(id__)])
>
>+/*
>+ * FIXME: This only works for now since multi-tile and standalone media
>+ * happen to be mutually exclusive. Future platforms may change this...
>+ */
> #define for_each_gt(gt__, xe__, id__) \
>- for ((id__) = 0; (id__) < (xe__)->info.tile_count; (id__++)) \
>+ for ((id__) = 0; (id__) < (xe__)->info.gt_count; (id__)++) \
> for_each_if ((gt__) = xe_device_get_gt((xe__), (id__)))
>
> static inline struct xe_force_wake * gt_to_fw(struct xe_gt *gt)
>diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
>index da553878448d..17b6b1cc5adb 100644
>--- a/drivers/gpu/drm/xe/xe_device_types.h
>+++ b/drivers/gpu/drm/xe/xe_device_types.h
>@@ -190,6 +190,8 @@ struct xe_device {
> u8 vram_flags;
> /** @tile_count: Number of tiles */
> u8 tile_count;
>+ /** @gt_count: Total number of GTs for entire device */
>+ u8 gt_count;
> /** @vm_max_level: Max VM level */
> u8 vm_max_level;
>
>diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
>index ddb256a4e39c..51207e94b254 100644
>--- a/drivers/gpu/drm/xe/xe_pci.c
>+++ b/drivers/gpu/drm/xe/xe_pci.c
>@@ -556,7 +556,11 @@ static int xe_info_init(struct xe_device *xe,
> return PTR_ERR(tile->primary_gt);
>
> gt = tile->primary_gt;
>- gt->info.id = id; /* FIXME: Determine sensible numbering */
>+ /*
>+ * FIXME: GT numbering scheme may change depending on UAPI
>+ * decisions.
>+ */
>+ gt->info.id = xe->info.gt_count++;
> gt->info.type = XE_GT_TYPE_MAIN;
> gt->info.__engine_mask = graphics_desc->hw_engine_mask;
> if (MEDIA_VER(xe) < 13 && media_desc)
>--
>2.40.1
>
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