[Intel-xe] [PATCH] drm/xe/wa: Extend scope of Wa_14015795083

[Souza, Jose]

On Fri, 2023-06-02 at 16:10 -0700, Matt Roper wrote:
> Wa_14015795083 was already implemented for DG2 and PVC, but the
> workaround database has been updated to extend it to more platforms.  It
> should now apply to all platforms with graphics versions 12.00 - 12.60,
> as well as A-step of Xe_LPG (12.70 / 12.71).

Reviewed-by: José Roberto de Souza <jose.souza at intel.com>

> 
> Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
> ---
>  drivers/gpu/drm/xe/xe_wa.c | 19 +++++++++++--------
>  1 file changed, 11 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
> index d9906f326d38..e5b3ff669465 100644
> --- a/drivers/gpu/drm/xe/xe_wa.c
> +++ b/drivers/gpu/drm/xe/xe_wa.c
> @@ -107,6 +107,10 @@ static const struct xe_rtp_entry_sr gt_was[] = {
>  	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(1200, 1210)),
>  	  XE_RTP_ACTIONS(SET(DFR_RATIO_EN_AND_CHICKEN, DFR_DISABLE))
>  	},
> +	{ XE_RTP_NAME("14015795083"),
> +	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(1200, 1260)),
> +	  XE_RTP_ACTIONS(CLR(MISCCPCTL, DOP_CLOCK_GATE_RENDER_ENABLE))
> +	},
>  
>  	/* DG1 */
>  
> @@ -195,10 +199,6 @@ static const struct xe_rtp_entry_sr gt_was[] = {
>  	  XE_RTP_RULES(PLATFORM(DG2)),
>  	  XE_RTP_ACTIONS(CLR(SARB_CHICKEN1, COMP_CKN_IN))
>  	},
> -	{ XE_RTP_NAME("14015795083"),
> -	  XE_RTP_RULES(PLATFORM(DG2)),
> -	  XE_RTP_ACTIONS(CLR(MISCCPCTL, DOP_CLOCK_GATE_RENDER_ENABLE))
> -	},
>  	{ XE_RTP_NAME("18018781329"),
>  	  XE_RTP_RULES(PLATFORM(DG2)),
>  	  XE_RTP_ACTIONS(SET(RENDER_MOD_CTRL, FORCE_MISS_FTLB),
> @@ -219,10 +219,6 @@ static const struct xe_rtp_entry_sr gt_was[] = {
>  
>  	/* PVC */
>  
> -	{ XE_RTP_NAME("14015795083"),
> -	  XE_RTP_RULES(PLATFORM(PVC)),
> -	  XE_RTP_ACTIONS(CLR(MISCCPCTL, DOP_CLOCK_GATE_RENDER_ENABLE))
> -	},
>  	{ XE_RTP_NAME("18018781329"),
>  	  XE_RTP_RULES(PLATFORM(PVC)),
>  	  XE_RTP_ACTIONS(SET(RENDER_MOD_CTRL, FORCE_MISS_FTLB),
> @@ -234,6 +230,13 @@ static const struct xe_rtp_entry_sr gt_was[] = {
>  	  XE_RTP_RULES(PLATFORM(PVC)),
>  	  XE_RTP_ACTIONS(SET(XEHPC_LNCFMISCCFGREG0, XEHPC_OVRLSCCC))
>  	},
> +
> +	/* Xe_LPG */
> +	{ XE_RTP_NAME("14015795083"),
> +	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(1270, 1271), GRAPHICS_STEP(A0, B0)),
> +	  XE_RTP_ACTIONS(CLR(MISCCPCTL, DOP_CLOCK_GATE_RENDER_ENABLE))
> +	},
> +
>  	{}
>  };
>