[Intel-xe] [PATCH 1/1] drm/xe: REBAR resize should be best effort

[Ruhl, Michael J]

>-----Original Message-----
>From: De Marchi, Lucas <lucas.demarchi at intel.com>
>Sent: Monday, June 5, 2023 12:40 PM
>To: Ruhl, Michael J <michael.j.ruhl at intel.com>
>Cc: intel-xe at lists.freedesktop.org; Auld, Matthew
><matthew.auld at intel.com>; Brost, Matthew <matthew.brost at intel.com>;
>Kershner, David <david.kershner at intel.com>
>Subject: Re: [PATCH 1/1] drm/xe: REBAR resize should be best effort
>
>On Mon, Jun 05, 2023 at 12:17:05PM -0400, Michael J. Ruhl wrote:
>>The resizing of the PCI BAR is a best effort feature.  If it is
>>not available, it should not fail the driver probe.
>>
>>Rework the resize to not exit on failure.
>>
>
>I think this deserves a
>
>Fixes: <commit that regressed this>

Makes sense.  I will update the commit.

>>Signed-off-by: Michael J. Ruhl <michael.j.ruhl at intel.com>
>
>
>with this patch, xe module load works again for me on one of my test
>systems, thanks.

Very good.

>
>Acked-by: Lucas De Marchi <lucas.demarchi at intel.com>

Thanks!
m

>Lucas De Marchi
>
>>---
>> drivers/gpu/drm/xe/xe_mmio.c | 28 +++++++++++-----------------
>> 1 file changed, 11 insertions(+), 17 deletions(-)
>>
>>diff --git a/drivers/gpu/drm/xe/xe_mmio.c
>b/drivers/gpu/drm/xe/xe_mmio.c
>>index 475b14fe4356..f7a7f996b37f 100644
>>--- a/drivers/gpu/drm/xe/xe_mmio.c
>>+++ b/drivers/gpu/drm/xe/xe_mmio.c
>>@@ -47,7 +47,7 @@ static int xe_set_dma_info(struct xe_device *xe)
>> 	return err;
>> }
>>
>>-static int
>>+static void
>> _resize_bar(struct xe_device *xe, int resno, resource_size_t size)
>> {
>> 	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
>>@@ -61,18 +61,17 @@ _resize_bar(struct xe_device *xe, int resno,
>resource_size_t size)
>> 	if (ret) {
>> 		drm_info(&xe->drm, "Failed to resize BAR%d to %dM (%pe).
>Consider enabling 'Resizable BAR' support in your BIOS\n",
>> 			 resno, 1 << bar_size, ERR_PTR(ret));
>>-		return ret;
>>+		return;
>> 	}
>>
>> 	drm_info(&xe->drm, "BAR%d resized to %dM\n", resno, 1 <<
>bar_size);
>>-	return ret;
>> }
>>
>> /*
>>  * if force_vram_bar_size is set, attempt to set to the requested size
>>  * else set to maximum possible size
>>  */
>>-static int xe_resize_vram_bar(struct xe_device *xe)
>>+static void xe_resize_vram_bar(struct xe_device *xe)
>> {
>> 	u64 force_vram_bar_size = xe_force_vram_bar_size;
>> 	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
>>@@ -83,14 +82,13 @@ static int xe_resize_vram_bar(struct xe_device *xe)
>> 	u32 bar_size_mask;
>> 	u32 pci_cmd;
>> 	int i;
>>-	int ret;
>>
>> 	/* gather some relevant info */
>> 	current_size = pci_resource_len(pdev, GEN12_LMEM_BAR);
>> 	bar_size_mask = pci_rebar_get_possible_sizes(pdev,
>GEN12_LMEM_BAR);
>>
>> 	if (!bar_size_mask)
>>-		return 0;
>>+		return;
>>
>> 	/* set to a specific size? */
>> 	if (force_vram_bar_size) {
>>@@ -104,22 +102,22 @@ static int xe_resize_vram_bar(struct xe_device
>*xe)
>> 			drm_info(&xe->drm,
>> 				 "Requested size: %lluMiB is not supported by
>rebar sizes: 0x%x. Leaving default: %lluMiB\n",
>> 				 (u64)rebar_size >> 20, bar_size_mask,
>(u64)current_size >> 20);
>>-			return 0;
>>+			return;
>> 		}
>>
>> 		rebar_size = 1ULL << (__fls(bar_size_bit) + BAR_SIZE_SHIFT);
>>
>> 		if (rebar_size == current_size)
>>-			return 0;
>>+			return;
>> 	} else {
>> 		rebar_size = 1ULL << (__fls(bar_size_mask) +
>BAR_SIZE_SHIFT);
>>
>> 		/* only resize if larger than current */
>> 		if (rebar_size <= current_size)
>>-			return 0;
>>+			return;
>> 	}
>>
>>-	drm_info(&xe->drm, "Resizing bar from %lluMiB -> %lluMiB\n",
>>+	drm_info(&xe->drm, "Attempting to resize bar from %lluMiB ->
>%lluMiB\n",
>> 		 (u64)current_size >> 20, (u64)rebar_size >> 20);
>>
>> 	while (root->parent)
>>@@ -133,17 +131,16 @@ static int xe_resize_vram_bar(struct xe_device
>*xe)
>>
>> 	if (!root_res) {
>> 		drm_info(&xe->drm, "Can't resize VRAM BAR - platform
>support is missing. Consider enabling 'Resizable BAR' support in your BIOS\n");
>>-		return -1;
>>+		return;
>> 	}
>>
>> 	pci_read_config_dword(pdev, PCI_COMMAND, &pci_cmd);
>> 	pci_write_config_dword(pdev, PCI_COMMAND, pci_cmd &
>~PCI_COMMAND_MEMORY);
>>
>>-	ret = _resize_bar(xe, GEN12_LMEM_BAR, rebar_size);
>>+	_resize_bar(xe, GEN12_LMEM_BAR, rebar_size);
>>
>> 	pci_assign_unassigned_bus_resources(pdev->bus);
>> 	pci_write_config_dword(pdev, PCI_COMMAND, pci_cmd);
>>-	return ret;
>> }
>>
>> static bool xe_pci_resource_valid(struct pci_dev *pdev, int bar)
>>@@ -163,16 +160,13 @@ static bool xe_pci_resource_valid(struct pci_dev
>*pdev, int bar)
>> static int xe_determine_lmem_bar_size(struct xe_device *xe)
>> {
>> 	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
>>-	int err;
>>
>> 	if (!xe_pci_resource_valid(pdev, GEN12_LMEM_BAR)) {
>> 		drm_err(&xe->drm, "pci resource is not valid\n");
>> 		return -ENXIO;
>> 	}
>>
>>-	err = xe_resize_vram_bar(xe);
>>-	if (err)
>>-		return err;
>>+	xe_resize_vram_bar(xe);
>>
>> 	xe->mem.vram.io_start = pci_resource_start(pdev,
>GEN12_LMEM_BAR);
>> 	xe->mem.vram.io_size = pci_resource_len(pdev,
>GEN12_LMEM_BAR);
>>--
>>2.39.2
>>