[Intel-xe] [PATCH v2 2/5] drm/xe: Group engine related structs
Lucas De Marchi
lucas.demarchi at intel.com
Wed Jun 7 05:05:29 UTC 2023
On Wed, May 31, 2023 at 03:23:35PM +0000, Francois Dugast wrote:
>Move the definition of drm_xe_engine_class_instance to group it with
>other engine related structs and to follow the ioctls order.
>
>Reported-by: Oded Gabbay <ogabbay at kernel.org>
>Link: https://lists.freedesktop.org/archives/intel-xe/2023-May/004704.html
>Signed-off-by: Francois Dugast <francois.dugast at intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>
Lucas De Marchi
>---
> include/uapi/drm/xe_drm.h | 36 ++++++++++++++++++------------------
> 1 file changed, 18 insertions(+), 18 deletions(-)
>
>diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
>index ac3cfc1fb4a5..5d34b570a305 100644
>--- a/include/uapi/drm/xe_drm.h
>+++ b/include/uapi/drm/xe_drm.h
>@@ -116,24 +116,6 @@ struct xe_user_extension {
> #define DRM_IOCTL_XE_WAIT_USER_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence)
> #define DRM_IOCTL_XE_VM_MADVISE DRM_IOW( DRM_COMMAND_BASE + DRM_XE_VM_MADVISE, struct drm_xe_vm_madvise)
>
>-struct drm_xe_engine_class_instance {
>- __u16 engine_class;
>-
>-#define DRM_XE_ENGINE_CLASS_RENDER 0
>-#define DRM_XE_ENGINE_CLASS_COPY 1
>-#define DRM_XE_ENGINE_CLASS_VIDEO_DECODE 2
>-#define DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE 3
>-#define DRM_XE_ENGINE_CLASS_COMPUTE 4
>- /*
>- * Kernel only class (not actual hardware engine class). Used for
>- * creating ordered queues of VM bind operations.
>- */
>-#define DRM_XE_ENGINE_CLASS_VM_BIND 5
>-
>- __u16 engine_instance;
>- __u16 gt_id;
>-};
>-
> #define XE_MEM_REGION_CLASS_SYSMEM 0
> #define XE_MEM_REGION_CLASS_VRAM 1
>
>@@ -518,6 +500,24 @@ struct drm_xe_engine_set_property {
> __u64 reserved[2];
> };
>
>+struct drm_xe_engine_class_instance {
>+ __u16 engine_class;
>+
>+#define DRM_XE_ENGINE_CLASS_RENDER 0
>+#define DRM_XE_ENGINE_CLASS_COPY 1
>+#define DRM_XE_ENGINE_CLASS_VIDEO_DECODE 2
>+#define DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE 3
>+#define DRM_XE_ENGINE_CLASS_COMPUTE 4
>+ /*
>+ * Kernel only class (not actual hardware engine class). Used for
>+ * creating ordered queues of VM bind operations.
>+ */
>+#define DRM_XE_ENGINE_CLASS_VM_BIND 5
>+
>+ __u16 engine_instance;
>+ __u16 gt_id;
>+};
>+
> struct drm_xe_engine_create {
> /** @extensions: Pointer to the first extension struct, if any */
> #define XE_ENGINE_EXTENSION_SET_PROPERTY 0
>--
>2.34.1
>
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