[Intel-xe] [PATCH] drm/xe: Donot apply forcewake while reading actual frequency

Matt Roper matthew.d.roper at intel.com
Wed Jun 7 22:48:04 UTC 2023


On Wed, Jun 07, 2023 at 01:40:04PM +0530, Badal Nilawar wrote:
> The registers RPSTAT1, MTL_MIRROR_TARGET_WP1 doesn't fall under
> any of the forcewake domain so doesn't require forcewake to be read.
> When GT in RC6 frequency reported will be 0.
> 
> Fixes: 7dbca224f176 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
> 
> Signed-off-by: Badal Nilawar <badal.nilawar at intel.com>

RPSTAT1 is an sgunit register and thus doesn't need forcewake (which is
a GT-only concept).  MTL_MIRROR_TARGET_WP1 is within an "always on"
power domain and thus doesn't require any forcewake to ensure the
register is powered up and usable.

Reviewed-by: Matt Roper <matthew.d.roper at intel.com>

> ---
>  drivers/gpu/drm/xe/xe_guc_pc.c | 10 +---------
>  1 file changed, 1 insertion(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_guc_pc.c b/drivers/gpu/drm/xe/xe_guc_pc.c
> index 67faa9ee0006..d04600b943e4 100644
> --- a/drivers/gpu/drm/xe/xe_guc_pc.c
> +++ b/drivers/gpu/drm/xe/xe_guc_pc.c
> @@ -371,14 +371,8 @@ static ssize_t freq_act_show(struct device *dev,
>  	ssize_t ret;
>  
>  	xe_device_mem_access_get(gt_to_xe(gt));
> -	/*
> -	 * When in RC6, actual frequency is 0. Let's block RC6 so we are able
> -	 * to verify that our freq requests are really happening.
> -	 */
> -	ret = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);
> -	if (ret)
> -		goto out;
>  
> +	/* When in RC6, actual frequency reported will be 0. */
>  	if (xe->info.platform == XE_METEORLAKE) {
>  		freq = xe_mmio_read32(gt, MTL_MIRROR_TARGET_WP1);
>  		freq = REG_FIELD_GET(MTL_CAGF_MASK, freq);
> @@ -389,8 +383,6 @@ static ssize_t freq_act_show(struct device *dev,
>  
>  	ret = sysfs_emit(buf, "%d\n", decode_freq(freq));
>  
> -	XE_WARN_ON(xe_force_wake_put(gt_to_fw(gt), XE_FORCEWAKE_ALL));
> -out:
>  	xe_device_mem_access_put(gt_to_xe(gt));
>  	return ret;
>  }
> -- 
> 2.25.1
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation


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