[Intel-xe] ✓ CI.checkpatch: success for drm/xe: limit GGTT size to GUC_GGTT_TOP

[Patchwork]

== Series Details ==

Series: drm/xe: limit GGTT size to GUC_GGTT_TOP
URL   : https://patchwork.freedesktop.org/series/119355/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
c7d32770e3cd31d9fc134ce41f329b10aa33ee15
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 83942ba6c1d4a8215c7600e23109b9e2e3c9e26d
Author: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
Date:   Wed Jun 14 17:25:21 2023 -0700

    drm/xe: limit GGTT size to GUC_GGTT_TOP
    
    The GuC can't access addresses above GUC_GGTT_TOP, so any GuC-accessible
    objects can't be mapped above that offset. Instead of checking each
    object to see if GuC may access it or not before mapping it, we just
    limit the GGTT size to GUC_GGTT_TOP. This wastes a bit of address space
    (about ~18 MBs, which is in addition to what already removed at the bottom
    of the GGTT), but it is a good tradeoff to keep the code simple.
    
    The in-code comment has also been updated to explain the limitation.
    
    Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
+ /mt/dim checkpatch 6d2981d42cd891965094ec7d173203520cfa36f7 drm-intel
83942ba6c drm/xe: limit GGTT size to GUC_GGTT_TOP