[Intel-xe] [PATCH V5 4/4] drm/xe: Make usable size of VRAM readable
Lucas De Marchi
lucas.demarchi at intel.com
Thu Jun 29 03:41:00 UTC 2023
On Wed, Jun 28, 2023 at 12:45:27PM +0530, Tejas Upadhyay wrote:
>Current size member of vram struct does not give
>complete information as what "size" contains. Does
>it contain reserved portions or not. Name it usable
>size and accordingly describe other size members as
>well.
>
>Signed-off-by: Tejas Upadhyay <tejas.upadhyay at intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>
thanks
Lucas De Marchi
>---
> drivers/gpu/drm/xe/display/xe_plane_initial.c | 2 +-
> drivers/gpu/drm/xe/xe_bo.c | 2 +-
> drivers/gpu/drm/xe/xe_device_types.h | 13 ++++++++++---
> drivers/gpu/drm/xe/xe_mmio.c | 6 +++---
> drivers/gpu/drm/xe/xe_query.c | 2 +-
> drivers/gpu/drm/xe/xe_tile.c | 2 +-
> drivers/gpu/drm/xe/xe_ttm_vram_mgr.c | 3 ++-
> 7 files changed, 19 insertions(+), 11 deletions(-)
>
>diff --git a/drivers/gpu/drm/xe/display/xe_plane_initial.c b/drivers/gpu/drm/xe/display/xe_plane_initial.c
>index 99c35a4ef673..fad4c66a8226 100644
>--- a/drivers/gpu/drm/xe/display/xe_plane_initial.c
>+++ b/drivers/gpu/drm/xe/display/xe_plane_initial.c
>@@ -83,7 +83,7 @@ initial_plane_bo(struct xe_device *xe,
> * We don't currently expect this to ever be placed in the
> * stolen portion.
> */
>- if (phys_base >= tile0->mem.vram.size) {
>+ if (phys_base >= tile0->mem.vram.usable_size) {
> drm_err(&xe->drm,
> "Initial plane programming using invalid range, phys_base=%pa\n",
> &phys_base);
>diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
>index 21fca198a882..e240df6c7ae6 100644
>--- a/drivers/gpu/drm/xe/xe_bo.c
>+++ b/drivers/gpu/drm/xe/xe_bo.c
>@@ -125,7 +125,7 @@ static void add_vram(struct xe_device *xe, struct xe_bo *bo,
> {
> struct xe_tile *tile = mem_type_to_tile(xe, mem_type);
>
>- XE_BUG_ON(!tile->mem.vram.size);
>+ XE_BUG_ON(!tile->mem.vram.usable_size);
>
> places[*c] = (struct ttm_place) {
> .mem_type = mem_type,
>diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
>index bd3e20ce3a4b..6afe37c8704e 100644
>--- a/drivers/gpu/drm/xe/xe_device_types.h
>+++ b/drivers/gpu/drm/xe/xe_device_types.h
>@@ -129,11 +129,18 @@ struct xe_tile {
> resource_size_t io_size;
> /** @base: offset of VRAM starting base */
> resource_size_t base;
>- /** @size: size of VRAM. */
>- resource_size_t size;
>+ /**
>+ * @usable_size: usable size of VRAM
>+ *
>+ * Usable size of VRAM excluding reserved portions
>+ * (e.g stolen mem)
>+ */
>+ resource_size_t usable_size;
> /**
> * @actual_physical_size: Actual VRAM size
>- * including stolen mem for tile
>+ *
>+ * Actual VRAM size including reserved portions
>+ * (e.g stolen mem)
> */
> resource_size_t actual_physical_size;
> /** @mapping: pointer to VRAM mappable space */
>diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c
>index 7d92258cd35d..5effb21db9d4 100644
>--- a/drivers/gpu/drm/xe/xe_mmio.c
>+++ b/drivers/gpu/drm/xe/xe_mmio.c
>@@ -289,13 +289,13 @@ int xe_mmio_probe_vram(struct xe_device *xe)
> tile->mem.vram.base = tile_offset;
>
> /* small bar can limit the visible size. size accordingly */
>- tile->mem.vram.size = min_t(u64, vram_size, io_size);
>+ tile->mem.vram.usable_size = min_t(u64, vram_size, io_size);
> tile->mem.vram.mapping = xe->mem.vram.mapping + tile_offset;
>
> drm_info(&xe->drm, "VRAM[%u, %u]: %pa, %pa\n", id, tile->id,
>- &tile->mem.vram.io_start, &tile->mem.vram.size);
>+ &tile->mem.vram.io_start, &tile->mem.vram.usable_size);
>
>- if (tile->mem.vram.io_size < tile->mem.vram.size)
>+ if (tile->mem.vram.io_size < tile->mem.vram.usable_size)
> drm_info(&xe->drm, "VRAM[%u, %u]: CPU access limited to %pa\n", id,
> tile->id, &tile->mem.vram.io_size);
>
>diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
>index 15e171ca7e62..9acbb27dfcab 100644
>--- a/drivers/gpu/drm/xe/xe_query.c
>+++ b/drivers/gpu/drm/xe/xe_query.c
>@@ -188,7 +188,7 @@ static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
> config->num_params = num_params;
> config->info[XE_QUERY_CONFIG_REV_AND_DEVICE_ID] =
> xe->info.devid | (xe->info.revid << 16);
>- if (xe_device_get_root_tile(xe)->mem.vram.size)
>+ if (xe_device_get_root_tile(xe)->mem.vram.usable_size)
> config->info[XE_QUERY_CONFIG_FLAGS] =
> XE_QUERY_CONFIG_FLAGS_HAS_VRAM;
> if (xe->info.enable_guc)
>diff --git a/drivers/gpu/drm/xe/xe_tile.c b/drivers/gpu/drm/xe/xe_tile.c
>index ac70486d09c3..e0bc2b60ab09 100644
>--- a/drivers/gpu/drm/xe/xe_tile.c
>+++ b/drivers/gpu/drm/xe/xe_tile.c
>@@ -101,7 +101,7 @@ static int tile_ttm_mgr_init(struct xe_tile *tile)
> struct xe_device *xe = tile_to_xe(tile);
> int err;
>
>- if (tile->mem.vram.size) {
>+ if (tile->mem.vram.usable_size) {
> err = xe_ttm_vram_mgr_init(tile, tile->mem.vram_mgr);
> if (err)
> return err;
>diff --git a/drivers/gpu/drm/xe/xe_ttm_vram_mgr.c b/drivers/gpu/drm/xe/xe_ttm_vram_mgr.c
>index 1a84abd35fcf..a10fd0366da3 100644
>--- a/drivers/gpu/drm/xe/xe_ttm_vram_mgr.c
>+++ b/drivers/gpu/drm/xe/xe_ttm_vram_mgr.c
>@@ -360,7 +360,8 @@ int xe_ttm_vram_mgr_init(struct xe_tile *tile, struct xe_ttm_vram_mgr *mgr)
> mgr->tile = tile;
>
> return __xe_ttm_vram_mgr_init(xe, mgr, XE_PL_VRAM0 + tile->id,
>- tile->mem.vram.size, tile->mem.vram.io_size,
>+ tile->mem.vram.usable_size,
>+ tile->mem.vram.io_size,
> PAGE_SIZE);
> }
>
>--
>2.25.1
>
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