[Intel-xe] [PATCH v3 00/14] DG2 + PVC + ADL workarounds and infra
Lucas De Marchi
lucas.demarchi at intel.com
Tue Mar 14 00:29:58 UTC 2023
Some of the infra patches that got reviewed in v1 were applied.
Almost all patches from v2 were also reviewed, but one patch in the middle
blocks them. Also this includes missing workarounds from ADL-S and ADL-P.
Tested in DG2, ADL-S, ADL-P and PVC. The latter needs one additional patch:
https://lore.kernel.org/intel-xe/20230310191430.2229799-1-lucas.demarchi@intel.com/T/#u
(or passing enable_display=0 module param).
v3:
- Add ADL-S and ADL-P workarounds
- Move the patch with policy on preemption to the end, so it doesn't block
the other patches. Also fix it to apply to all graphics versions.
Lucas De Marchi (14):
drm/xe/rtp: Add match helper for gslice fused off
drm/xe/reg_sr: Tweak verbosity for register printing
drm/xe: Print whitelist while applying
drm/xe/debugfs: Dump register save-restore tables
drm/xe: Reorder WAs to consider the platform
drm/xe: Add PVC gt workarounds
drm/xe: Add PVC engine workarounds
drm/xe: Add missing DG2 gt workarounds and tunings
drm/xe: Add missing DG2 engine workarounds
drm/xe: Add missing DG2 lrc tunings
drm/xe: Add missing DG2 lrc workarounds
drm/xe: Add missing ADL-P engine workaround
drm/xe: Add missing LRC workarounds for graphics 1200
drm/xe: Move policy on preemption from WAs to tunings
drivers/gpu/drm/xe/regs/xe_gt_regs.h | 92 +++++-
drivers/gpu/drm/xe/xe_gt_debugfs.c | 30 ++
drivers/gpu/drm/xe/xe_hw_engine.c | 2 +
drivers/gpu/drm/xe/xe_reg_sr.c | 32 ++
drivers/gpu/drm/xe/xe_reg_sr.h | 2 +
drivers/gpu/drm/xe/xe_reg_whitelist.c | 59 ++++
drivers/gpu/drm/xe/xe_reg_whitelist.h | 10 +
drivers/gpu/drm/xe/xe_rtp.c | 16 +
drivers/gpu/drm/xe/xe_rtp.h | 11 +
drivers/gpu/drm/xe/xe_tuning.c | 47 +++
drivers/gpu/drm/xe/xe_tuning.h | 1 +
drivers/gpu/drm/xe/xe_wa.c | 408 +++++++++++++++++++++++---
12 files changed, 672 insertions(+), 38 deletions(-)
--
2.39.0
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