[Intel-xe] [PATCH v3 13/14] drm/xe: Add missing LRC workarounds for graphics 1200

[Lucas De Marchi]

On Tue, Mar 14, 2023 at 04:39:26PM -0700, Matt Roper wrote:
>On Mon, Mar 13, 2023 at 05:30:11PM -0700, Lucas De Marchi wrote:
>> Synchronize LRC workarounds for graphics version 1200 with i915 up to
>> commit 7cdae9e9ee5e ("drm/i915: Move DG2 tuning to the right function").
>> These were probably missed for TGL/RKL before because in i915 it uses a
>> !IS_DG1() condition.  Avoid a similar issue by just checking the
>> graphics version 1200 since DG1 is 1210.
>>
>> Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
>
>Reviewed-by: Matt Roper <matthew.d.roper at intel.com>
>
>for the changes here.  However on the topic of LRC workarounds, it looks
>like commit 6d4750630a27b ("drm/xe: Fix duplicated setting for register
>0x6604") was incorrect and should probably be reverted.  That patch
>moved a real workaround (handling of GS_TIMER) into the tuning function,
>but dropped the tuning setting (handling of TDS timer).  The workaround
>and tuning setting are updating disjoint bitfields of the register;
>they're not equivalent.

right... I will have to revert it and figure out why the warning was
triggered.

thanks
Lucas De Marchi