[Intel-xe] [PATCH 2/2] drm/xe: Drop legacy GuC interrupt register definition
Matt Roper
matthew.d.roper at intel.com
Fri May 19 17:28:22 UTC 2023
On Fri, May 19, 2023 at 06:59:27PM +0200, Michal Wajdeczko wrote:
> It was used by the Gen9 hardware, not supported by this driver.
>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko at intel.com>
> Cc: Matt Roper <matthew.d.roper at intel.com>
Reviewed-by: Matt Roper <matthew.d.roper at intel.com>
> ---
> drivers/gpu/drm/xe/regs/xe_guc_regs.h | 4 ----
> 1 file changed, 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/regs/xe_guc_regs.h b/drivers/gpu/drm/xe/regs/xe_guc_regs.h
> index f08966c2be20..20430927eafa 100644
> --- a/drivers/gpu/drm/xe/regs/xe_guc_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_guc_regs.h
> @@ -86,10 +86,6 @@
> #define GUC_ENABLE_READ_CACHE_LOGIC REG_BIT(1)
> #define GUC_DISABLE_SRAM_INIT_TO_ZEROES REG_BIT(0)
>
> -
> -#define GUC_SEND_INTERRUPT XE_REG(0xc4c8)
> -#define GUC_SEND_TRIGGER REG_BIT(0)
> -
> #define GUC_NUM_DOORBELLS 256
>
> /* format of the HW-monitored doorbell cacheline */
> --
> 2.25.1
>
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
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