[Intel-xe] [PATCH 11/21] drm/xe/oa: Override GuC RC with OA on PVC

[Umesh Nerlige Ramappa]

On Tue, Sep 19, 2023 at 09:10:39AM -0700, Ashutosh Dixit wrote:
>On PVC, a w/a resets RCS/CCS before it goes into RC6. This breaks OA since
>OA does not expect engine resets during its use. Fix it by disabling RC6.
>
>Signed-off-by: Ashutosh Dixit <ashutosh.dixit at intel.com>

lgtm
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa at intel.com>

>---
> drivers/gpu/drm/xe/xe_guc_pc.c   | 60 ++++++++++++++++++++++++++++++++
> drivers/gpu/drm/xe/xe_guc_pc.h   |  3 ++
> drivers/gpu/drm/xe/xe_oa.c       | 26 +++++++++++++-
> drivers/gpu/drm/xe/xe_oa_types.h |  6 ++++
> 4 files changed, 94 insertions(+), 1 deletion(-)
>
>diff --git a/drivers/gpu/drm/xe/xe_guc_pc.c b/drivers/gpu/drm/xe/xe_guc_pc.c
>index 8a4d299d6cb02..a91de057f6246 100644
>--- a/drivers/gpu/drm/xe/xe_guc_pc.c
>+++ b/drivers/gpu/drm/xe/xe_guc_pc.c
>@@ -225,6 +225,27 @@ static int pc_action_set_param(struct xe_guc_pc *pc, u8 id, u32 value)
> 	return ret;
> }
>
>+static int pc_action_unset_param(struct xe_guc_pc *pc, u8 id)
>+{
>+	struct xe_guc_ct *ct = &pc_to_guc(pc)->ct;
>+	int ret;
>+	u32 action[] = {
>+		GUC_ACTION_HOST2GUC_PC_SLPC_REQUEST,
>+		SLPC_EVENT(SLPC_EVENT_PARAMETER_UNSET, 1),
>+		id,
>+	};
>+
>+	if (wait_for_pc_state(pc, SLPC_GLOBAL_STATE_RUNNING))
>+		return -EAGAIN;
>+
>+	ret = xe_guc_ct_send(ct, action, ARRAY_SIZE(action), 0, 0);
>+	if (ret)
>+		drm_err(&pc_to_xe(pc)->drm, "GuC PC unset param failed: %pe",
>+			ERR_PTR(ret));
>+
>+	return ret;
>+}
>+
> static int pc_action_setup_gucrc(struct xe_guc_pc *pc, u32 mode)
> {
> 	struct xe_guc_ct *ct = &pc_to_guc(pc)->ct;
>@@ -768,6 +789,45 @@ int xe_guc_pc_gucrc_disable(struct xe_guc_pc *pc)
> 	return ret;
> }
>
>+/**
>+ * xe_guc_pc_override_gucrc_mode() - override GUCRC mode
>+ * @pc: Xe_GuC_PC instance
>+ * @mode: new value of the mode.
>+ *
>+ * Override the GUCRC mode.
>+ *
>+ * Return: 0 on success, negative error code on error.
>+ */
>+int xe_guc_pc_override_gucrc_mode(struct xe_guc_pc *pc, enum slpc_gucrc_mode mode)
>+{
>+	int ret;
>+
>+	xe_device_mem_access_get(pc_to_xe(pc));
>+	ret = pc_action_set_param(pc, SLPC_PARAM_PWRGATE_RC_MODE, mode);
>+	xe_device_mem_access_put(pc_to_xe(pc));
>+
>+	return ret;
>+}
>+
>+/**
>+ * xe_guc_pc_override_gucrc_mode() - override GUCRC mode
>+ * @pc: Xe_GuC_PC instance
>+ *
>+ * Unset the GUCRC mode override
>+ *
>+ * Return: 0 on success, negative error code on error.
>+ */
>+int xe_guc_pc_unset_gucrc_mode(struct xe_guc_pc *pc)
>+{
>+	int ret;
>+
>+	xe_device_mem_access_get(pc_to_xe(pc));
>+	ret = pc_action_unset_param(pc, SLPC_PARAM_PWRGATE_RC_MODE);
>+	xe_device_mem_access_put(pc_to_xe(pc));
>+
>+	return ret;
>+}
>+
> static void pc_init_pcode_freq(struct xe_guc_pc *pc)
> {
> 	u32 min = DIV_ROUND_CLOSEST(pc->rpn_freq, GT_FREQUENCY_MULTIPLIER);
>diff --git a/drivers/gpu/drm/xe/xe_guc_pc.h b/drivers/gpu/drm/xe/xe_guc_pc.h
>index 43ea582545b57..0a2c7b9a4dc97 100644
>--- a/drivers/gpu/drm/xe/xe_guc_pc.h
>+++ b/drivers/gpu/drm/xe/xe_guc_pc.h
>@@ -7,12 +7,15 @@
> #define _XE_GUC_PC_H_
>
> #include "xe_guc_pc_types.h"
>+#include "abi/guc_actions_slpc_abi.h"
>
> int xe_guc_pc_init(struct xe_guc_pc *pc);
> void xe_guc_pc_fini(struct xe_guc_pc *pc);
> int xe_guc_pc_start(struct xe_guc_pc *pc);
> int xe_guc_pc_stop(struct xe_guc_pc *pc);
> int xe_guc_pc_gucrc_disable(struct xe_guc_pc *pc);
>+int xe_guc_pc_override_gucrc_mode(struct xe_guc_pc *pc, enum slpc_gucrc_mode mode);
>+int xe_guc_pc_unset_gucrc_mode(struct xe_guc_pc *pc);
>
> enum xe_gt_idle_state xe_guc_pc_c_status(struct xe_guc_pc *pc);
> u64 xe_guc_pc_rc6_residency(struct xe_guc_pc *pc);
>diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
>index fc0159543dc74..506dd056805b2 100644
>--- a/drivers/gpu/drm/xe/xe_oa.c
>+++ b/drivers/gpu/drm/xe/xe_oa.c
>@@ -23,6 +23,7 @@
> #include "xe_exec_queue.h"
> #include "xe_gt.h"
> #include "xe_gt_mcr.h"
>+#include "xe_guc_pc.h"
> #include "xe_lrc.h"
> #include "xe_migrate.h"
> #include "xe_mmio.h"
>@@ -909,6 +910,10 @@ static void xe_oa_stream_destroy(struct xe_oa_stream *stream)
> 	xe_device_mem_access_put(stream->oa->xe);
>
> 	xe_oa_free_oa_buffer(stream);
>+	/* Wa_1509372804:pvc: * Unset the override of GUCRC mode to enable rc6 */
>+	if (stream->override_gucrc)
>+		XE_WARN_ON(xe_guc_pc_unset_gucrc_mode(&gt->uc.guc.pc));
>+
> 	xe_oa_free_configs(stream);
> }
>
>@@ -1344,9 +1349,25 @@ static int xe_oa_stream_init(struct xe_oa_stream *stream,
> 		goto exit;
> 	}
>
>+	/*
>+	 * Wa_1509372804:pvc
>+	 *
>+	 * GuC reset of engines causes OA to lose configuration
>+	 * state. Prevent this by overriding GUCRC mode.
>+	 *
>+	 */
>+	if (gt->tile->xe->info.platform == XE_PVC) {
>+		ret = xe_guc_pc_override_gucrc_mode(&gt->uc.guc.pc,
>+						    SLPC_GUCRC_MODE_GUCRC_NO_RC6);
>+		if (ret)
>+			goto err_free_configs;
>+
>+		stream->override_gucrc = true;
>+	}
>+
> 	ret = xe_oa_alloc_oa_buffer(stream);
> 	if (ret)
>-		goto err_free_configs;
>+		goto err_unset_gucrc;
>
> 	/* Take runtime pm ref and forcewake to disable RC6 */
> 	xe_device_mem_access_get(stream->oa->xe);
>@@ -1377,6 +1398,9 @@ static int xe_oa_stream_init(struct xe_oa_stream *stream,
> 	XE_WARN_ON(xe_force_wake_put(gt_to_fw(gt), XE_FORCEWAKE_ALL));
> 	xe_device_mem_access_put(stream->oa->xe);
> 	xe_oa_free_oa_buffer(stream);
>+err_unset_gucrc:
>+	if (stream->override_gucrc)
>+		XE_WARN_ON(xe_guc_pc_unset_gucrc_mode(&gt->uc.guc.pc));
> err_free_configs:
> 	xe_oa_free_configs(stream);
> exit:
>diff --git a/drivers/gpu/drm/xe/xe_oa_types.h b/drivers/gpu/drm/xe/xe_oa_types.h
>index 4063c81e353ff..126692718c888 100644
>--- a/drivers/gpu/drm/xe/xe_oa_types.h
>+++ b/drivers/gpu/drm/xe/xe_oa_types.h
>@@ -291,5 +291,11 @@ struct xe_oa_stream {
> 	 * buffer should be checked for available data.
> 	 */
> 	u64 poll_oa_period;
>+
>+	/**
>+	 * @override_gucrc: GuC RC has been overridden for the perf stream,
>+	 * and we need to restore the default configuration on release.
>+	 */
>+	bool override_gucrc;
> };
> #endif
>-- 
>2.41.0
>