[Intel-xe] [PATCH 2/2] drm/xe/xe2: Report number of Xe2 EUs
Lucas De Marchi
lucas.demarchi at intel.com
Thu Sep 21 14:04:13 UTC 2023
On Wed, Sep 20, 2023 at 02:50:55PM -0700, Matt Roper wrote:
>On Wed, Sep 20, 2023 at 02:21:03PM -0700, Lucas De Marchi wrote:
>> With Xe2, one bit in the fuse enables one Xe2 EU. Note that although
>> Bspec 62564 still refers to 1 bit == a pair of EUs, this is about the
>> legacy number according to Bspec 70820.
>
>+Cc Jose.
>
>Looking at the bspec history it doesn't appear there's any true hardware
>change here; this is just a terminology change that someone thought
>would make the bspec more clear (so they added "legacy" to the true
>hardware count to distinguish it from the fuse register, and then later
>came back and added a separate "Num EU" column that matches fuse
it's being called "Xe2 EU" now
>register). And it seems that this attempted terminology change wasn't
>even handled consistently across various platforms. The equivalent
>bspec pages for most other platforms are still giving only the "legacy"
>numbers, either with or without the "legacy" label in the text.
like any rename change in doc or bspec?
>
>But regardless of which terminology is actually more/less confusing on
>that bspec page, what really matters is what our userspace partners
>want. If we want to change the uapi from reporting the true hardware
>value to reporting the fusing number, we should coordinate that
it's not just about reporting the fuse, it's about reporting the Xe2 EU
count... I don't think it's really an UAPI change - this is being done
to Xe2, we can't really change older platforms (not that it really
matters for the Xe driver, but I think it's best to keep the older
platforms as is).
>behavioral change with them. And if they're trying to access
>hardware-level ("legacy") EUs independently anywhere and can't just
>operate on pairs, then such a change may not be possible.
I pinged all the UMDs as if this was a UAPI change and pointed to this
thread for them to chime in.
Lucas De Marchi
>
>
>Matt
>
>>
>> Bspec: 70820, 70821, 62564
>> Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
>> ---
>> drivers/gpu/drm/xe/xe_gt_topology.c | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_gt_topology.c b/drivers/gpu/drm/xe/xe_gt_topology.c
>> index 011ad7f2325c..878f3ed7bc26 100644
>> --- a/drivers/gpu/drm/xe/xe_gt_topology.c
>> +++ b/drivers/gpu/drm/xe/xe_gt_topology.c
>> @@ -49,8 +49,8 @@ load_eu_mask(struct xe_gt *gt, xe_eu_mask_t mask)
>> if (GRAPHICS_VERx100(xe) < 1250)
>> reg_val = ~reg_val & XELP_EU_MASK;
>>
>> - /* On PVC, one bit = one EU */
>> - if (GRAPHICS_VERx100(xe) == 1260) {
>> + if (GRAPHICS_VERx100(xe) >= 2000 || GRAPHICS_VERx100(xe) == 1260) {
>> + /* One bit == one EU */
>> val = reg_val;
>> } else {
>> /* All other platforms, one bit = 2 EU */
>> --
>> 2.40.1
>>
>
>--
>Matt Roper
>Graphics Software Engineer
>Linux GPU Platform Enablement
>Intel Corporation
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