✓ CI.Patch_applied: success for Enable display support for Battlemage

Patchwork patchwork at emeril.freedesktop.org
Mon Apr 15 19:43:21 UTC 2024


== Series Details ==

Series: Enable display support for Battlemage
URL   : https://patchwork.freedesktop.org/series/132430/
State : success

== Summary ==

=== Applying kernel patches on branch 'drm-tip' with base: ===
Base commit: 1bfe3965a846 drm-tip: 2024y-04m-15d-18h-46m-59s UTC integration manifest
=== git am output follows ===
Applying: drm/xe/display: Lane reversal requires writes to both context lanes
Applying: drm/i915/display: Enable RM timeout detection
Applying: drm/i915/bmg: Define IS_BATTLEMAGE macro
Applying: drm/i915/xe2hpd: Skip CCS modifiers
Applying: drm/i915/xe2hpd: Initial cdclk table
Applying: drm/i915/bmg: Extend DG2 tc check to future
Applying: drm/i915/xe2hpd: Properly disable power in port A
Applying: drm/i915/xe2hpd: Add new C20 PHY SRAM address
Applying: drm/i915/xe2hpd: Add support for eDP PLL configuration
Applying: drm/i915/xe2hpd: update pll values in sync with Bspec
Applying: drm/i915/xe2hpd: Add display info
Applying: drm/i915/xe2hpd: Configure CHICKEN_MISC_2 before enabling planes
Applying: drm/i915/xe2hpd: Add max memory bandwidth algorithm
Applying: drm/i915/xe2hpd: Do not program MBUS_DBOX BW credits
Applying: drm/i915/bmg: BMG should re-use MTL's south display logic
Applying: Revert "drm/i915/dgfx: DGFX uses direct VBT pin mapping"
Applying: drm/i915/xe2hpd: Set maximum DP rate to UHBR13.5
Applying: drm/xe/gt_print: add xe_gt_err_once()
Applying: drm/xe/device: implement transient flush
Applying: drm/i915/display: perform transient flush
Applying: drm/xe/bmg: Enable the display support




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