[PATCH] drm/xe/xe2_lpg: Add Wa_16018610683
Matt Roper
matthew.d.roper at intel.com
Tue Jan 9 18:27:59 UTC 2024
On Tue, Jan 09, 2024 at 11:25:50AM +0530, Shekhar Chauhan wrote:
> Force max 128KB SLM during WMTP PASS1 Restore.
>
> BSpec: 70202
> Signed-off-by: Shekhar Chauhan <shekhar.chauhan at intel.com>
Reviewed-by: Matt Roper <matthew.d.roper at intel.com>
> ---
> drivers/gpu/drm/xe/regs/xe_gt_regs.h | 3 +++
> drivers/gpu/drm/xe/xe_wa.c | 5 ++++-
> 2 files changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> index 6dfad86aaea6..4017319c6300 100644
> --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> @@ -345,6 +345,9 @@
> #define ROW_CHICKEN3 XE_REG_MCR(0xe49c, XE_REG_OPTION_MASKED)
> #define DIS_FIX_EOT1_FLUSH REG_BIT(9)
>
> +#define TDL_TSL_CHICKEN XE_REG_MCR(0xe4c4, XE_REG_OPTION_MASKED)
> +#define SLM_WMTP_RESTORE REG_BIT(11)
> +
> #define ROW_CHICKEN XE_REG_MCR(0xe4f0, XE_REG_OPTION_MASKED)
> #define UGM_BACKUP_MODE REG_BIT(13)
> #define MDQ_ARBITRATION_MODE REG_BIT(12)
> diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
> index b77d406e083e..3299130ba10a 100644
> --- a/drivers/gpu/drm/xe/xe_wa.c
> +++ b/drivers/gpu/drm/xe/xe_wa.c
> @@ -455,7 +455,10 @@ static const struct xe_rtp_entry_sr engine_was[] = {
> PPHWSP_CSB_AND_TIMESTAMP_REPORT_DIS,
> XE_RTP_ACTION_FLAG(ENGINE_BASE)))
> },
> -
> + { XE_RTP_NAME("16018610683"),
> + XE_RTP_RULES(GRAPHICS_VERSION(2004), FUNC(xe_rtp_match_first_render_or_compute)),
> + XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, SLM_WMTP_RESTORE))
> + },
> {}
> };
>
> --
> 2.34.1
>
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
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