[PATCH 4/5] drm/xe/xe2: Limit ccs framebuffers to tile4 only
Juha-Pekka Heikkila
juhapekka.heikkila at gmail.com
Fri Jan 26 21:08:06 UTC 2024
Display engine support ccs only with tile4, prevent other modifiers
from using compressed memory. Store pin time pat index to xe_bo.
Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>
---
drivers/gpu/drm/xe/display/xe_fb_pin.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index 722c84a56607..b2930a226f54 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -10,9 +10,18 @@
#include "intel_fb_pin.h"
#include "xe_ggtt.h"
#include "xe_gt.h"
+#include "xe_pat.h"
#include <drm/ttm/ttm_bo.h>
+static bool is_compressed(const struct drm_framebuffer *fb)
+{
+ struct xe_bo *bo = intel_fb_obj(fb);
+ struct xe_device *xe = to_xe_device(to_intel_framebuffer(fb)->base.dev);
+
+ return xe_pat_index_has_compression(xe, bo->pat_index);
+}
+
static void
write_dpt_rotated(struct xe_bo *bo, struct iosys_map *map, u32 *dpt_ofs, u32 bo_ofs,
u32 width, u32 height, u32 src_stride, u32 dst_stride)
@@ -349,12 +358,22 @@ void intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags)
int intel_plane_pin_fb(struct intel_plane_state *plane_state)
{
struct drm_framebuffer *fb = plane_state->hw.fb;
+ struct xe_device *xe = to_xe_device(to_intel_framebuffer(fb)->base.dev);
struct xe_bo *bo = intel_fb_obj(fb);
struct i915_vma *vma;
/* We reject creating !SCANOUT fb's, so this is weird.. */
drm_WARN_ON(bo->ttm.base.dev, !(bo->flags & XE_BO_SCANOUT_BIT));
+ if (GRAPHICS_VER(xe) >= 20) {
+ if (fb->modifier != I915_FORMAT_MOD_4_TILED &&
+ is_compressed(fb)) {
+ drm_warn(&xe->drm, "Cannot create ccs framebuffer with other than tile4 mofifier\n");
+ return -EINVAL;
+ }
+ bo->pat_index_scanout = bo->pat_index;
+ }
+
vma = __xe_pin_fb_vma(to_intel_framebuffer(fb), &plane_state->view.gtt);
if (IS_ERR(vma))
return PTR_ERR(vma);
--
2.25.1
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