[PATCH] drm/xe/oa: Enable Xe2+ PES disaggregation

[Lucas De Marchi]

On Mon, Sep 09, 2024 at 09:59:33AM GMT, Ashutosh Dixit wrote:
>Xe2+ PES disaggregation for OAG needs to be enabled to obtain disaggregated
>metrics when disaggregated data is needed. There is no uapi impact of this

it looks like the *control* for disaggregated data is only available on
xe2 and we always use disaggregated, right?

>change.
>
>v2: Minor change to commit message
>
>Bspec: 61101

"Note: After enabling desired disaggregation mode/s using this control
field, PES MODE_SELECT field is used to configure appropriate
disaggregation mode of corresponding PEC."

Apparently MODE_SELECT == Aggregated is the hw default for xe2. Don't
we need to program anything else?

>Fixes: e936f885f1e9 ("drm/xe/oa/uapi: Expose OA stream fd")
>Signed-off-by: Ashutosh Dixit <ashutosh.dixit at intel.com>
>Cc: stable at vger.kernel.org

If double checking above and this is sufficient, feel free to add my

	Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>

Lucas De Marchi

>---
> drivers/gpu/drm/xe/regs/xe_oa_regs.h | 1 +
> drivers/gpu/drm/xe/xe_oa.c           | 4 ++++
> 2 files changed, 5 insertions(+)
>
>diff --git a/drivers/gpu/drm/xe/regs/xe_oa_regs.h b/drivers/gpu/drm/xe/regs/xe_oa_regs.h
>index 1189f5a540a82..a9b0091cb7ee1 100644
>--- a/drivers/gpu/drm/xe/regs/xe_oa_regs.h
>+++ b/drivers/gpu/drm/xe/regs/xe_oa_regs.h
>@@ -52,6 +52,7 @@
> #define  OAG_OABUFFER_MEMORY_SELECT		REG_BIT(0) /* 0: PPGTT, 1: GGTT */
>
> #define OAG_OACONTROL				XE_REG(0xdaf4)
>+#define  OAG_OACONTROL_OA_PES_DISAG_EN		REG_GENMASK(27, 22)
> #define  OAG_OACONTROL_OA_CCS_SELECT_MASK	REG_GENMASK(18, 16)
> #define  OAG_OACONTROL_OA_COUNTER_SEL_MASK	REG_GENMASK(4, 2)
> #define  OAG_OACONTROL_OA_COUNTER_ENABLE	REG_BIT(0)
>diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
>index 63286ed8457fa..0369cc016f6ab 100644
>--- a/drivers/gpu/drm/xe/xe_oa.c
>+++ b/drivers/gpu/drm/xe/xe_oa.c
>@@ -440,6 +440,10 @@ static void xe_oa_enable(struct xe_oa_stream *stream)
> 	val = __format_to_oactrl(format, regs->oa_ctrl_counter_select_mask) |
> 		__oa_ccs_select(stream) | OAG_OACONTROL_OA_COUNTER_ENABLE;
>
>+	if (GRAPHICS_VER(stream->oa->xe) >= 20 &&
>+	    stream->hwe->oa_unit->type == DRM_XE_OA_UNIT_TYPE_OAG)
>+		val |= OAG_OACONTROL_OA_PES_DISAG_EN;
>+
> 	xe_mmio_write32(stream->gt, regs->oa_ctrl, val);
> }
>
>-- 
>2.41.0
>