[v2] drm/xe/pciid: Add new PCI id for ARL
Pottumuttu, Sai Teja
sai.teja.pottumuttu at intel.com
Thu Sep 19 04:54:25 UTC 2024
On 12-09-2024 17:29, Dnyaneshwar Bhadane wrote:
> Add new PCI id for ARL platform.
>
> v2: Fix typo in PCI id (SaiTeja)
>
> Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane at intel.com>
Looks good,
Reviewed-by: Sai Teja Pottumuttu <sai.teja.pottumuttu at intel.com>
> ---
> include/drm/intel/xe_pciids.h | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/include/drm/intel/xe_pciids.h b/include/drm/intel/xe_pciids.h
> index 79001afa7d27d..b733555258b13 100644
> --- a/include/drm/intel/xe_pciids.h
> +++ b/include/drm/intel/xe_pciids.h
> @@ -181,7 +181,8 @@
> MACRO__(0x7D41, ## __VA_ARGS__), \
> MACRO__(0x7D51, ## __VA_ARGS__), \
> MACRO__(0x7D67, ## __VA_ARGS__), \
> - MACRO__(0x7DD1, ## __VA_ARGS__)
> + MACRO__(0x7DD1, ## __VA_ARGS__), \
> + MACRO__(0xB640, ## __VA_ARGS__)
>
> /* MTL */
> #define XE_MTL_IDS(MACRO__, ...) \
More information about the Intel-xe
mailing list