[v2] drm/xe/pciid: Add new PCI id for ARL

[Upadhyay, Tejas]

> -----Original Message-----
> From: Intel-xe <intel-xe-bounces at lists.freedesktop.org> On Behalf Of
> Dnyaneshwar Bhadane
> Sent: Thursday, September 12, 2024 5:29 PM
> To: intel-xe at lists.freedesktop.org
> Cc: Bhadane, Dnyaneshwar <dnyaneshwar.bhadane at intel.com>
> Subject: [v2] drm/xe/pciid: Add new PCI id for ARL
> 
> Add new PCI id for ARL platform.
> 
> v2: Fix typo in PCI id (SaiTeja)
> 
> Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane at intel.com>
> ---
>  include/drm/intel/xe_pciids.h | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/include/drm/intel/xe_pciids.h b/include/drm/intel/xe_pciids.h
> index 79001afa7d27d..b733555258b13 100644
> --- a/include/drm/intel/xe_pciids.h
> +++ b/include/drm/intel/xe_pciids.h
> @@ -181,7 +181,8 @@
>  	MACRO__(0x7D41, ## __VA_ARGS__),	\
>  	MACRO__(0x7D51, ## __VA_ARGS__),        \
>  	MACRO__(0x7D67, ## __VA_ARGS__),	\
> -	MACRO__(0x7DD1, ## __VA_ARGS__)
> +	MACRO__(0x7DD1, ## __VA_ARGS__),	\
> +	MACRO__(0xB640, ## __VA_ARGS__)

Pciiids matches the doc,
Reviewed-by: Tejas Upadhyay <tejas.upadhyay at intel.com>

> 
>  /* MTL */
>  #define XE_MTL_IDS(MACRO__, ...)		\
> --
> 2.34.1