[PATCH 2/2] drm/xe: Remove GEN11 prefixes from documentation

Cavitt, Jonathan jonathan.cavitt at intel.com
Thu Mar 6 22:27:40 UTC 2025


-----Original Message-----
From: Intel-xe <intel-xe-bounces at lists.freedesktop.org> On Behalf Of Lucas De Marchi
Sent: Thursday, March 6, 2025 2:08 PM
To: intel-xe at lists.freedesktop.org
Cc: De Marchi, Lucas <lucas.demarchi at intel.com>
Subject: [PATCH 2/2] drm/xe: Remove GEN11 prefixes from documentation
> 
> The registers are already named without the GEN11 prefix. Do the same in
> the memirq documentation.
> 
> Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
> ---
>  drivers/gpu/drm/xe/xe_memirq.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_memirq.c b/drivers/gpu/drm/xe/xe_memirq.c
> index 404fa2a456d5870837fce225b5150398733d1e98..49c45ec3e83caf9aeff279912b80a0b109bc4a94 100644
> --- a/drivers/gpu/drm/xe/xe_memirq.c
> +++ b/drivers/gpu/drm/xe/xe_memirq.c
> @@ -86,7 +86,7 @@ static const char *guc_name(struct xe_guc *guc)
>   *   This object needs to be 4KiB aligned.
>   *
>   * - _`Interrupt Source Report Page`: this is the equivalent of the
> - *   GEN11_GT_INTR_DWx registers, with each bit in those registers being
> + *   GT_INTR_DWx registers, with each bit in those registers being
>   *   mapped to a byte here. The offsets are the same, just bytes instead
>   *   of bits. This object needs to be cacheline aligned.

NIT:
Debatably, the whole comment block should be reformatted to align with the
corrected name:
"""
 * - _`Interrupt Source Report Page`: this is the equivalent of the
 *   GT_INTR_DWx registers, with each bit in those registers being mapped
 *   to a byte here. The offsets are the same, just bytes instead of
 *   bits. This object needs to be cacheline aligned.
"""
Or perhaps:
"""
* - _`Interrupt Source Report Page`: this is the equivalent of the
 *   GT_INTR_DWx registers, with each bit in those registers being mapped
 *   to a byte here. The offsets are the same, just bytes instead of bits.
 *   This object needs to be cacheline aligned.
"""

However, I won't block on this.  With or without the suggested change,
this patch is:
Reviewed-by: Jonathan Cavitt <jonathan.cavitt at intel.com>
-Jonathan Cavitt

>   *
> 
> -- 
> 2.48.1
> 


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