[PATCH 2/2] drm/xe: Remove GEN11 prefixes from documentation

[Upadhyay, Tejas]

> -----Original Message-----
> From: Intel-xe <intel-xe-bounces at lists.freedesktop.org> On Behalf Of Lucas
> De Marchi
> Sent: Friday, March 7, 2025 3:38 AM
> To: intel-xe at lists.freedesktop.org
> Cc: De Marchi, Lucas <lucas.demarchi at intel.com>
> Subject: [PATCH 2/2] drm/xe: Remove GEN11 prefixes from documentation
> 
> The registers are already named without the GEN11 prefix. Do the same in the
> memirq documentation.
> 
> Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
> ---
>  drivers/gpu/drm/xe/xe_memirq.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_memirq.c
> b/drivers/gpu/drm/xe/xe_memirq.c index
> 404fa2a456d5870837fce225b5150398733d1e98..49c45ec3e83caf9aeff279
> 912b80a0b109bc4a94 100644
> --- a/drivers/gpu/drm/xe/xe_memirq.c
> +++ b/drivers/gpu/drm/xe/xe_memirq.c
> @@ -86,7 +86,7 @@ static const char *guc_name(struct xe_guc *guc)
>   *   This object needs to be 4KiB aligned.
>   *
>   * - _`Interrupt Source Report Page`: this is the equivalent of the
> - *   GEN11_GT_INTR_DWx registers, with each bit in those registers being
> + *   GT_INTR_DWx registers, with each bit in those registers being
>   *   mapped to a byte here. The offsets are the same, just bytes instead
>   *   of bits. This object needs to be cacheline aligned.

commit 6b7ece97dd21d2b80a41f6192f89f8848c3b1d76
Author: Matt Roper <matthew.d.roper at intel.com>
Date:   Fri Mar 31 17:21:02 2023 -0700

    drm/xe/irq: Drop unnecessary GEN11_ and GEN12_ register prefixes

This commit does same but probably missed in some documentations. Should we add Fixes tag?

However, LGTM,
Reviewed-by: Tejas Upadhyay <tejas.upadhyay at intel.com>

Tejas
>   *
> 
> --
> 2.48.1