[PATCH] drm/xe: Fix page fault queue calculation

Dafna Hirschfeld dafna.hirschfeld at intel.com
Sun May 4 04:59:25 UTC 2025


On 01.05.2025 18:32, Stuart Summers wrote:
>We followed up with the design architects to have a more
>precise calculation for a theoretical maximum number of
>page faults we might expect based on the number of TLBs
>available in the system. Fix the original calculation which
>did not take the number of TLBs into consideration.
>
>Fixes: 29582e0ea75c ("drm/xe: Add page queue multiplier")
>Fixes: 3338e4f90c14 ("drm/xe: Use topology to determine page fault queue size")
>
>Signed-off-by: Stuart Summers <stuart.summers at intel.com>
>---
> drivers/gpu/drm/xe/xe_gt_pagefault.c | 17 +++++++++++------
> 1 file changed, 11 insertions(+), 6 deletions(-)
>
>diff --git a/drivers/gpu/drm/xe/xe_gt_pagefault.c b/drivers/gpu/drm/xe/xe_gt_pagefault.c
>index 10622ca471a2..80a816c3837b 100644
>--- a/drivers/gpu/drm/xe/xe_gt_pagefault.c
>+++ b/drivers/gpu/drm/xe/xe_gt_pagefault.c
>@@ -436,15 +436,20 @@ static int xe_alloc_pf_queue(struct xe_gt *gt, struct pf_queue *pf_queue)
> 				XE_MAX_EU_FUSE_BITS) * num_dss;
>
> 	/*
>-	 * user can issue separate page faults per EU and per CS
>+	 * Each TLB can report up to 32 faults. The number of TLBs is
>+	 * equal to the number of render/compute/media engines plus twice
>+	 * the number of copy engines plus the number of EUs.
> 	 *
>-	 * XXX: Multiplier required as compute UMD are getting PF queue errors
>-	 * without it. Follow on why this multiplier is required.
>+	 * Reserve enough space here to ensure we are able to cover that
>+	 * theoretical maximum.
> 	 */
>-#define PF_MULTIPLIER	8
>+#define MAX_FAULTS_PER_TLB	32
> 	pf_queue->num_dw =
>-		(num_eus + XE_NUM_HW_ENGINES) * PF_MSG_LEN_DW * PF_MULTIPLIER;
>-#undef PF_MULTIPLIER
>+		PF_MSG_LEN_DW * MAX_FAULTS_PER_TLB *
>+		(num_eus +
>+		 hweight64(gt->info.engine_mask) +
>+		 hweight32(xe_hw_engine_mask_per_class(gt, XE_ENGINE_CLASS_COPY)));
>+#undef MAX_FAULTS_PER_TLB

the queue uses the circ-buffer API which assumes buffer size is a power of 2.
can we be sure that num_dw is a power of 2?

Thanks,
Dafna

>
> 	pf_queue->gt = gt;
> 	pf_queue->data = devm_kcalloc(xe->drm.dev, pf_queue->num_dw,
>-- 
>2.34.1
>


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