[PATCH v2 01/12] drm/i915/dp_mst: Use the correct connector while computing the link BPP limit on MST
Luca Coelho
luca at coelho.fi
Tue May 6 09:39:38 UTC 2025
On Mon, 2025-04-28 at 16:31 +0300, Imre Deak wrote:
> Atm, on an MST link in DSC mode
> intel_dp_compute_config_link_bpp_limits() calculates the maximum link
> bpp limit using the MST root connector's DSC capabilities. That's not
> correct in general: the decompression could be performed by a branch
> device downstream of the root branch device or the sink itself.
>
> Fix the above by passing to intel_dp_compute_config_link_bpp_limits()
> the actual connector being modeset, containing the correct DSC
> capabilities.
>
> Cc: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
> Fixes: 1c5b72daff46 ("drm/i915/dp: Set the DSC link limits in intel_dp_compute_config_link_bpp_limits")
> Signed-off-by: Imre Deak <imre.deak at intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 7 ++++---
> drivers/gpu/drm/i915/display/intel_dp.h | 1 +
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 5 +++--
> 3 files changed, 8 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 607aea1bf6fa2..d63aea7ee9c80 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2523,6 +2523,7 @@ intel_dp_dsc_compute_pipe_bpp_limits(struct intel_dp *intel_dp,
>
> bool
> intel_dp_compute_config_limits(struct intel_dp *intel_dp,
> + struct intel_connector *connector,
> struct intel_crtc_state *crtc_state,
> bool respect_downstream_limits,
> bool dsc,
> @@ -2576,7 +2577,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
> intel_dp_test_compute_config(intel_dp, crtc_state, limits);
>
> return intel_dp_compute_config_link_bpp_limits(intel_dp,
> - intel_dp->attached_connector,
> + connector,
> crtc_state,
> dsc,
> limits);
> @@ -2637,7 +2638,7 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
> joiner_needs_dsc = intel_dp_joiner_needs_dsc(display, num_joined_pipes);
>
> dsc_needed = joiner_needs_dsc || intel_dp->force_dsc_en ||
> - !intel_dp_compute_config_limits(intel_dp, pipe_config,
> + !intel_dp_compute_config_limits(intel_dp, connector, pipe_config,
> respect_downstream_limits,
> false,
> &limits);
> @@ -2671,7 +2672,7 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
> str_yes_no(ret), str_yes_no(joiner_needs_dsc),
> str_yes_no(intel_dp->force_dsc_en));
>
> - if (!intel_dp_compute_config_limits(intel_dp, pipe_config,
> + if (!intel_dp_compute_config_limits(intel_dp, connector, pipe_config,
> respect_downstream_limits,
> true,
> &limits))
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
> index 9189db4c25946..98f90955fdb1d 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -194,6 +194,7 @@ void intel_dp_wait_source_oui(struct intel_dp *intel_dp);
> int intel_dp_output_bpp(enum intel_output_format output_format, int bpp);
>
> bool intel_dp_compute_config_limits(struct intel_dp *intel_dp,
> + struct intel_connector *connector,
> struct intel_crtc_state *crtc_state,
> bool respect_downstream_limits,
> bool dsc,
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index d19ef1fef452b..49b836cd8816c 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -621,12 +621,13 @@ adjust_limits_for_dsc_hblank_expansion_quirk(struct intel_dp *intel_dp,
>
> static bool
> mst_stream_compute_config_limits(struct intel_dp *intel_dp,
> - const struct intel_connector *connector,
> + struct intel_connector *connector,
> struct intel_crtc_state *crtc_state,
> bool dsc,
> struct link_config_limits *limits)
> {
> - if (!intel_dp_compute_config_limits(intel_dp, crtc_state, false, dsc,
> + if (!intel_dp_compute_config_limits(intel_dp, connector,
> + crtc_state, false, dsc,
> limits))
> return false;
>
Makes sense.
Reviewed-by: Luca Coelho <luciano.coelho at intel.com>
--
Cheers,
Luca.
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