[PATCH v2 06/12] drm/i915/dp_mst: Simplify computing the min/max compressed bpp limits
Nautiyal, Ankit K
ankit.k.nautiyal at intel.com
Tue May 6 10:16:13 UTC 2025
On 4/28/2025 7:01 PM, Imre Deak wrote:
> Adjusting the compressed bpp range min/max limits in
> intel_dp_dsc_nearest_valid_bpp() is unnecessary:
>
> - The source/sink min/max values are enforced already by the
> link_config_limits::min_bpp_x16/max_bpp_x16 values computed early in
> intel_dp_compute_config_link_bpp_limits().
> - The fixed set of valid bpps are enforced already - for all bpps in the
> min .. max range by intel_dp_dsc_valid_compressed_bpp() called from
> intel_dp_mtp_tu_compute_config().
>
> The only thing needed is limiting max compressed bpp below the
> uncompressed pipe bpp, do that one thing only instead of calling
> intel_dp_dsc_nearest_valid_bpp().
Makes sense.
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
>
> Signed-off-by: Imre Deak <imre.deak at intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
> drivers/gpu/drm/i915/display/intel_dp.h | 2 --
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 6 +-----
> 3 files changed, 2 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 5c206faadf93a..42b45598a0134 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -846,7 +846,7 @@ small_joiner_ram_size_bits(struct intel_display *display)
> return 6144 * 8;
> }
>
> -u32 intel_dp_dsc_nearest_valid_bpp(struct intel_display *display, u32 bpp, u32 pipe_bpp)
> +static u32 intel_dp_dsc_nearest_valid_bpp(struct intel_display *display, u32 bpp, u32 pipe_bpp)
> {
> u32 bits_per_pixel = bpp;
> int i;
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
> index a9dd9ed1afc9d..3206c86adaba6 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -174,8 +174,6 @@ bool intel_dp_supports_dsc(struct intel_dp *intel_dp,
> const struct intel_connector *connector,
> const struct intel_crtc_state *crtc_state);
>
> -u32 intel_dp_dsc_nearest_valid_bpp(struct intel_display *display, u32 bpp, u32 pipe_bpp);
> -
> void intel_ddi_update_pipe(struct intel_atomic_state *state,
> struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state,
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 77acac8963e27..23bb9aa554fc6 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -513,11 +513,7 @@ static int mst_stream_dsc_compute_link_config(struct intel_dp *intel_dp,
> drm_dbg_kms(display->drm, "DSC Sink supported compressed min bpp %d compressed max bpp %d\n",
> min_compressed_bpp, max_compressed_bpp);
>
> - /* Align compressed bpps according to our own constraints */
> - max_compressed_bpp = intel_dp_dsc_nearest_valid_bpp(display, max_compressed_bpp,
> - crtc_state->pipe_bpp);
> - min_compressed_bpp = intel_dp_dsc_nearest_valid_bpp(display, min_compressed_bpp,
> - crtc_state->pipe_bpp);
> + max_compressed_bpp = min(max_compressed_bpp, crtc_state->pipe_bpp - 1);
>
> crtc_state->lane_count = limits->max_lane_count;
> crtc_state->port_clock = limits->max_rate;
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