[PATCH v2 08/12] drm/i915/dp_mst: Add support for fractional compressed link bpps on MST

[Nautiyal, Ankit K]

On 4/28/2025 7:01 PM, Imre Deak wrote:
> Add support for a fractional compressed link bpp on an MST link. Leave
> the actual enabling of fractional bpps to a follow-up change.
>
> While at it add an assert before the bpp loop, that the min and max bpps
> are aligned to the bpp step. This should hold regardless of the non-DSC/DSC
> or MST/UHBR-SST modes.
>
> This keeps the mode validation and DSC->DPT BW specific maximum link
> bpps as rounded-down integer values still, changing those to a
> fractional value is left for later, add here TODO comments for them.
>
> v2:
> - Align the min/max bpp value to the bpp step.
> - Assert that the min/max bpp values are aligned to the bpp step.
>
> Signed-off-by: Imre Deak <imre.deak at intel.com>

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>


> ---
>   drivers/gpu/drm/i915/display/intel_dp.c     |  1 +
>   drivers/gpu/drm/i915/display/intel_dp_mst.c | 32 +++++++++++++++------
>   2 files changed, 24 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 7abc5286f4ccc..0f89a301e4a0d 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -957,6 +957,7 @@ u32 get_max_compressed_bpp_with_joiner(struct intel_display *display,
>   	return max_bpp;
>   }
>   
> +/* TODO: return a bpp_x16 value */
>   u16 intel_dp_dsc_get_max_compressed_bpp(struct intel_display *display,
>   					u32 link_clock, u32 lane_count,
>   					u32 mode_clock, u32 mode_hdisplay,
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 23bb9aa554fc6..a1203e5f570cb 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -23,6 +23,9 @@
>    *
>    */
>   
> +#include <linux/log2.h>
> +#include <linux/math.h>
> +
>   #include <drm/drm_atomic.h>
>   #include <drm/drm_atomic_helper.h>
>   #include <drm/drm_edid.h>
> @@ -135,6 +138,7 @@ static bool intel_dp_mst_inc_active_streams(struct intel_dp *intel_dp)
>   	return intel_dp->mst.active_streams++ == 0;
>   }
>   
> +/* TODO: return a bpp_x16 value */
>   static int intel_dp_mst_max_dpt_bpp(const struct intel_crtc_state *crtc_state,
>   				    bool dsc)
>   {
> @@ -335,6 +339,8 @@ int intel_dp_mtp_tu_compute_config(struct intel_dp *intel_dp,
>   		}
>   	}
>   
> +	drm_WARN_ON(display->drm, min_bpp_x16 % bpp_step_x16 || max_bpp_x16 % bpp_step_x16);
> +
>   	for (bpp_x16 = max_bpp_x16; bpp_x16 >= min_bpp_x16; bpp_x16 -= bpp_step_x16) {
>   		int local_bw_overhead;
>   		int link_bpp_x16;
> @@ -482,7 +488,8 @@ static int mst_stream_dsc_compute_link_config(struct intel_dp *intel_dp,
>   	int num_bpc;
>   	u8 dsc_bpc[3] = {};
>   	int min_bpp, max_bpp, sink_min_bpp, sink_max_bpp;
> -	int min_compressed_bpp, max_compressed_bpp;
> +	int min_compressed_bpp_x16, max_compressed_bpp_x16;
> +	int bpp_step_x16;
>   
>   	max_bpp = limits->pipe.max_bpp;
>   	min_bpp = limits->pipe.min_bpp;
> @@ -507,21 +514,28 @@ static int mst_stream_dsc_compute_link_config(struct intel_dp *intel_dp,
>   
>   	crtc_state->pipe_bpp = max_bpp;
>   
> -	max_compressed_bpp = fxp_q4_to_int(limits->link.max_bpp_x16);
> -	min_compressed_bpp = fxp_q4_to_int_roundup(limits->link.min_bpp_x16);
> +	min_compressed_bpp_x16 = limits->link.min_bpp_x16;
> +	max_compressed_bpp_x16 = limits->link.max_bpp_x16;
>   
> -	drm_dbg_kms(display->drm, "DSC Sink supported compressed min bpp %d compressed max bpp %d\n",
> -		    min_compressed_bpp, max_compressed_bpp);
> +	drm_dbg_kms(display->drm,
> +		    "DSC Sink supported compressed min bpp " FXP_Q4_FMT " compressed max bpp " FXP_Q4_FMT "\n",
> +		    FXP_Q4_ARGS(min_compressed_bpp_x16), FXP_Q4_ARGS(max_compressed_bpp_x16));
>   
> -	max_compressed_bpp = min(max_compressed_bpp, crtc_state->pipe_bpp - 1);
> +	bpp_step_x16 = fxp_q4_from_int(1);
> +
> +	max_compressed_bpp_x16 = min(max_compressed_bpp_x16, fxp_q4_from_int(crtc_state->pipe_bpp) - bpp_step_x16);
> +
> +	drm_WARN_ON(display->drm, !is_power_of_2(bpp_step_x16));
> +	min_compressed_bpp_x16 = round_up(min_compressed_bpp_x16, bpp_step_x16);
> +	max_compressed_bpp_x16 = round_down(max_compressed_bpp_x16, bpp_step_x16);
>   
>   	crtc_state->lane_count = limits->max_lane_count;
>   	crtc_state->port_clock = limits->max_rate;
>   
>   	return intel_dp_mtp_tu_compute_config(intel_dp, crtc_state, conn_state,
> -					      fxp_q4_from_int(min_compressed_bpp),
> -					      fxp_q4_from_int(max_compressed_bpp),
> -					      fxp_q4_from_int(1), true);
> +					      min_compressed_bpp_x16,
> +					      max_compressed_bpp_x16,
> +					      bpp_step_x16, true);
>   }
>   
>   static int mode_hblank_period_ns(const struct drm_display_mode *mode)