[PATCH v2 12/12] drm/i915/dp_mst: Enable fractional link bpps on MST if the bpp is forced

[Nautiyal, Ankit K]

On 4/28/2025 7:01 PM, Imre Deak wrote:
> Enable using a fractional (compressed) link bpp on MST links, if this is
> supported and the link bpp is forced. Fractional link bpps will be
> enabled by default as a follow-up change after testing this
> functionality within a set of commonly used MST monitors and docks/hubs
> which support it.
>
> Signed-off-by: Imre Deak <imre.deak at intel.com>

I agree to the approach to first have the fractional compressed bpp 
support tested via the debugfs and later enable the full support.

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>

> ---
>   drivers/gpu/drm/i915/display/intel_dp.c     | 6 +++++-
>   drivers/gpu/drm/i915/display/intel_dp.h     | 2 ++
>   drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
>   3 files changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 047473e3f6e6a..bba0a9db17a3c 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2102,7 +2102,7 @@ static int dsc_src_max_compressed_bpp(struct intel_dp *intel_dp)
>   /*
>    * Note: for pre-13 display you still need to check the validity of each step.
>    */
> -static int intel_dp_dsc_bpp_step_x16(const struct intel_connector *connector)
> +int intel_dp_dsc_bpp_step_x16(const struct intel_connector *connector)
>   {
>   	struct intel_display *display = to_intel_display(connector);
>   	u8 incr = drm_dp_dsc_sink_bpp_incr(connector->dp.dsc_dpcd);
> @@ -2110,6 +2110,10 @@ static int intel_dp_dsc_bpp_step_x16(const struct intel_connector *connector)
>   	if (DISPLAY_VER(display) < 14 || !incr)
>   		return fxp_q4_from_int(1);
>   
> +	if (connector->mst.dp &&
> +	    !connector->link.force_bpp_x16 && !connector->mst.dp->force_dsc_fractional_bpp_en)
> +		return fxp_q4_from_int(1);
> +
>   	/* fxp q4 */
>   	return fxp_q4_from_int(1) / incr;
>   }
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
> index f883fc0b65c06..c5ab25ee1a015 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -210,4 +210,6 @@ int intel_dp_dsc_max_src_input_bpc(struct intel_display *display);
>   int intel_dp_dsc_min_src_input_bpc(void);
>   int intel_dp_dsc_min_src_compressed_bpp(void);
>   
> +int intel_dp_dsc_bpp_step_x16(const struct intel_connector *connector);
> +
>   #endif /* __INTEL_DP_H__ */
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index a1203e5f570cb..4a5f920c11e2a 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -521,7 +521,7 @@ static int mst_stream_dsc_compute_link_config(struct intel_dp *intel_dp,
>   		    "DSC Sink supported compressed min bpp " FXP_Q4_FMT " compressed max bpp " FXP_Q4_FMT "\n",
>   		    FXP_Q4_ARGS(min_compressed_bpp_x16), FXP_Q4_ARGS(max_compressed_bpp_x16));
>   
> -	bpp_step_x16 = fxp_q4_from_int(1);
> +	bpp_step_x16 = intel_dp_dsc_bpp_step_x16(connector);
>   
>   	max_compressed_bpp_x16 = min(max_compressed_bpp_x16, fxp_q4_from_int(crtc_state->pipe_bpp) - bpp_step_x16);
>