✗ CI.checkpatch: warning for drm/i915/display: Send DSI DCS commands with pipeline flush in High Speed

[Patchwork]

== Series Details ==

Series: drm/i915/display: Send DSI DCS commands with pipeline flush in High Speed
URL   : https://patchwork.freedesktop.org/series/148781/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
202708c00696422fd217223bb679a353a5936e23
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 2c4b4dbb04288f1ac05cd13970b6242994a88ea0
Author: Gareth Yu <gareth.yu at intel.com>
Date:   Fri May 9 10:13:27 2025 +0800

    drm/i915/display: Send DSI DCS commands with pipeline flush in High Speed
    
    With all of the boundary conditions when streaming the commands B2B in our
    validation (part of the reason we added the flush),  the Flush effectively
    serializes the transmission of each command enqueued within the command
    dispatcher to one per V. Blank line which simplifies the behavior of the
    High Speed Arbitration.
    
    So, unless we absolutely have to burst these to the Sink, we should be using
    the Pipeline Flush bit to serialize the commands.
    
    Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14247
    
    Cc : Suraj Kandpal <suraj.kandpal at intel.com>
    Cc : Jani Nikula <jani.nikula at intel.com>
    Signed-off-by: Gareth Yu <gareth.yu at intel.com>
+ /mt/dim checkpatch 9dcef725fabeef32df86af6e5880acbfcb84e7a5 drm-intel
2c4b4dbb0428 drm/i915/display: Send DSI DCS commands with pipeline flush in High Speed
-:13: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#13: 
So, unless we absolutely have to burst these to the Sink, we should be using

total: 0 errors, 1 warnings, 0 checks, 21 lines checked