[PATCH v6 12/19] drm/xe: Export xe_emit_aux_table_inv
Tvrtko Ursulin
tvrtko.ursulin at igalia.com
Wed May 14 13:38:54 UTC 2025
Export the existing AuxCCS invalidation ring buffer programming helper
which we will need to use to setup the indirect context workaround in the
next patch.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin at igalia.com>
---
drivers/gpu/drm/xe/xe_ring_ops.c | 77 ++++++++++++++++++--------------
drivers/gpu/drm/xe/xe_ring_ops.h | 3 ++
2 files changed, 47 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
index 4da12f41ccb6..8a489a5c3bd4 100644
--- a/drivers/gpu/drm/xe/xe_ring_ops.c
+++ b/drivers/gpu/drm/xe/xe_ring_ops.c
@@ -50,22 +50,47 @@ static u32 preparser_disable(bool state)
return MI_ARB_CHECK | BIT(8) | state;
}
-static int emit_aux_table_inv(struct xe_gt *gt, struct xe_reg reg,
- u32 *dw, int i)
+u32 *xe_emit_aux_table_inv(struct xe_hw_engine *hwe, u32 *cmd)
{
- dw[i++] = MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1) | MI_LRI_MMIO_REMAP_EN;
- dw[i++] = reg.addr + gt->mmio.adj_offset;
- dw[i++] = AUX_INV;
- dw[i++] = MI_SEMAPHORE_WAIT_TOKEN |
- MI_SEMAPHORE_REGISTER_POLL |
- MI_SEMAPHORE_POLL |
- MI_SEMAPHORE_SAD_EQ_SDD;
- dw[i++] = 0;
- dw[i++] = reg.addr + gt->mmio.adj_offset;
- dw[i++] = 0;
- dw[i++] = 0;
+ struct xe_gt *gt = hwe->gt;
+ struct xe_reg reg;
- return i;
+ switch (hwe->class) {
+ case XE_ENGINE_CLASS_RENDER:
+ reg = CCS_AUX_INV;
+ break;
+ case XE_ENGINE_CLASS_COPY:
+ reg = BCS_AUX_INV;
+ break;
+ case XE_ENGINE_CLASS_VIDEO_DECODE:
+ reg = VD0_AUX_INV;
+ break;
+ default:
+ reg = VE0_AUX_INV;
+ };
+
+ *cmd++ = MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1) |
+ MI_LRI_MMIO_REMAP_EN;
+ *cmd++ = reg.addr + gt->mmio.adj_offset;
+ *cmd++ = AUX_INV;
+ *cmd++ = MI_SEMAPHORE_WAIT_TOKEN | MI_SEMAPHORE_REGISTER_POLL |
+ MI_SEMAPHORE_POLL | MI_SEMAPHORE_SAD_EQ_SDD;
+ *cmd++ = 0;
+ *cmd++ = reg.addr + gt->mmio.adj_offset;
+ *cmd++ = 0;
+ *cmd++ = 0;
+
+ return cmd;
+}
+
+static int emit_aux_table_inv(struct xe_hw_engine *hwe, u32 *dw, int i)
+{
+ u32 *start, *end;
+
+ start = dw + i;
+ end = xe_emit_aux_table_inv(hwe, start);
+
+ return i + (end - start);
}
static int emit_user_interrupt(u32 *dw, int i)
@@ -303,22 +328,8 @@ static void __emit_job_gen12_xcs(struct xe_sched_job *job, struct xe_lrc *lrc,
seqno, MI_INVALIDATE_TLB | flags, dw,
i);
/* hsdes: 1809175790 */
- if (aux_ccs) {
- struct xe_reg reg;
-
- switch (job->q->class) {
- case XE_ENGINE_CLASS_COPY:
- reg = BCS_AUX_INV;
- break;
- case XE_ENGINE_CLASS_VIDEO_DECODE:
- reg = VD0_AUX_INV;
- break;
- default:
- reg = VE0_AUX_INV;
- };
-
- i = emit_aux_table_inv(gt, reg, dw, i);
- }
+ if (aux_ccs)
+ i = emit_aux_table_inv(job->q->hwe, dw, i);
dw[i++] = preparser_disable(false);
} else {
i = emit_store_imm_ggtt(xe_lrc_start_seqno_ggtt_addr(lrc),
@@ -372,7 +383,7 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job,
/* hsdes: 1809175790 */
if (aux_ccs)
- i = emit_aux_table_inv(gt, CCS_AUX_INV, dw, i);
+ i = emit_aux_table_inv(job->q->hwe, dw, i);
dw[i++] = preparser_disable(false);
@@ -420,7 +431,7 @@ static void emit_migration_job_gen12(struct xe_sched_job *job,
dw, i);
/* hsdes: 1809175790 */
if (aux_ccs)
- i = emit_aux_table_inv(gt, BCS_AUX_INV, dw, i);
+ i = emit_aux_table_inv(job->q->hwe, dw, i);
dw[i++] = preparser_disable(false);
} else {
i = emit_store_imm_ggtt(xe_lrc_start_seqno_ggtt_addr(lrc),
@@ -436,7 +447,7 @@ static void emit_migration_job_gen12(struct xe_sched_job *job,
dw[i++] = preparser_disable(true);
i = emit_flush_invalidate(dw, i);
if (aux_ccs)
- i = emit_aux_table_inv(gt, BCS_AUX_INV, dw, i);
+ i = emit_aux_table_inv(job->q->hwe, dw, i);
dw[i++] = preparser_disable(false);
}
diff --git a/drivers/gpu/drm/xe/xe_ring_ops.h b/drivers/gpu/drm/xe/xe_ring_ops.h
index e942735d76a6..5a2d32f9bb25 100644
--- a/drivers/gpu/drm/xe/xe_ring_ops.h
+++ b/drivers/gpu/drm/xe/xe_ring_ops.h
@@ -10,8 +10,11 @@
#include "xe_ring_ops_types.h"
struct xe_gt;
+struct xe_hw_engine;
const struct xe_ring_ops *
xe_ring_ops_get(struct xe_gt *gt, enum xe_engine_class class);
+u32 *xe_emit_aux_table_inv(struct xe_hw_engine *hwe, u32 *cmd);
+
#endif
--
2.48.0
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