[PATCH v2 27/32] drm/xe/svm: Support DRM_XE_SVM_ATTR_PAT memory attribute
Ghimiray, Himal Prasad
himal.prasad.ghimiray at intel.com
Wed May 21 08:51:56 UTC 2025
On 15-05-2025 03:22, Matthew Brost wrote:
> On Mon, Apr 07, 2025 at 03:47:14PM +0530, Himal Prasad Ghimiray wrote:
>> This attributes sets the pat_index for the svm used vma range, which is
>> utilized to ascertain the coherence.
>>
>> Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray at intel.com>
>> ---
>> drivers/gpu/drm/xe/xe_vm_madvise.c | 9 ++++++++-
>> 1 file changed, 8 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_vm_madvise.c b/drivers/gpu/drm/xe/xe_vm_madvise.c
>> index f870e8642190..f4e0545937b0 100644
>> --- a/drivers/gpu/drm/xe/xe_vm_madvise.c
>> +++ b/drivers/gpu/drm/xe/xe_vm_madvise.c
>> @@ -104,7 +104,14 @@ static int madvise_pat_index(struct xe_device *xe, struct xe_vm *vm,
>> struct xe_vma **vmas, int num_vmas,
>> struct drm_xe_madvise_ops ops)
>> {
>> - /* Implementation pending */
>> + int i;
>> +
>> + xe_assert(vm->xe, ops.type == DRM_XE_VMA_ATTR_PAT);
>> + vm_dbg(&xe->drm, "attr_value = %d", ops.pat_index.val);
>
> I don't think the above vm_dbg is all that helpful. If it was per VMA, I
> could that being a bit more helpful.
Agreed.
>
> Otherwise LGTM.
>
> Matt
>
>> +
>> + for (i = 0; i < num_vmas; i++)
>> + vmas[i]->attr.pat_index = ops.pat_index.val;
>> +
>> return 0;
>> }
>>
>> --
>> 2.34.1
>>
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