[PATCH] drm/xe/gsc: Switch SW proxy allocation to uncached
Daniele Ceraolo Spurio
daniele.ceraolospurio at intel.com
Wed May 21 21:34:48 UTC 2025
We're recently started to see a number of issues that seem to be caused
by memory coherency between the driver and the GSC FW when processing SW
proxy (xe#5002, xe#5047, xe#5071). These are sporadic and seem to only
happen on one particular CI machine, so I wan't able to repro locally
and fully root-cause the problem.
Given the memory coherency suspicion, as a first attempt to fix the
issue switch the allocation of the SW proxy object to uncached and
see if it is enough. Note that there is no performance concern in not
having this cached as the proxy flow is not heavily used outside of
driver init.
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
Cc: Alan Previn Teres Alexis <alan.previn.teres.alexis at intel.com>
Cc: John Harrison <John.C.Harrison at Intel.com>
---
drivers/gpu/drm/xe/xe_gsc_proxy.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/xe_gsc_proxy.c b/drivers/gpu/drm/xe/xe_gsc_proxy.c
index d0519cd6704a..302e43bb8681 100644
--- a/drivers/gpu/drm/xe/xe_gsc_proxy.c
+++ b/drivers/gpu/drm/xe/xe_gsc_proxy.c
@@ -421,7 +421,8 @@ static int proxy_channel_alloc(struct xe_gsc *gsc)
bo = xe_managed_bo_create_pin_map(xe, tile, GSC_PROXY_CHANNEL_SIZE,
XE_BO_FLAG_SYSTEM |
- XE_BO_FLAG_GGTT);
+ XE_BO_FLAG_GGTT |
+ XE_BO_FLAG_NEEDS_UC);
if (IS_ERR(bo))
return PTR_ERR(bo);
--
2.43.0
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