[PATCH 4/5] drm/xe/lrc: Allow to add user commands on context switch
Lucas De Marchi
lucas.demarchi at intel.com
Fri May 23 18:54:38 UTC 2025
During validation it's useful to allows additional commands to be
executed on context switch. Fetch the commands from configfs (to be
added) and add them to the WA BB.
Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
---
drivers/gpu/drm/xe/xe_configfs.c | 6 ++++++
drivers/gpu/drm/xe/xe_configfs.h | 6 ++++++
drivers/gpu/drm/xe/xe_lrc.c | 24 ++++++++++++++++++++++--
3 files changed, 34 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index b27bbe203eb46..d73fe5a6666cb 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -374,6 +374,12 @@ u64 xe_configfs_get_engine_allowed(struct pci_dev *pdev)
return engine_allowed;
}
+u32 xe_configfs_get_wa_bb_cmds(struct pci_dev *pdev, enum xe_engine_class class,
+ const u32 * const *cs)
+{
+ return 0;
+}
+
int __init xe_configfs_init(void)
{
struct config_group *root = &xe_configfs.su_group;
diff --git a/drivers/gpu/drm/xe/xe_configfs.h b/drivers/gpu/drm/xe/xe_configfs.h
index 050da4689d653..928dfabcecd6e 100644
--- a/drivers/gpu/drm/xe/xe_configfs.h
+++ b/drivers/gpu/drm/xe/xe_configfs.h
@@ -7,6 +7,8 @@
#include <linux/types.h>
+#include <xe_hw_engine_types.h>
+
struct pci_dev;
#if IS_ENABLED(CONFIG_CONFIGFS_FS)
@@ -15,12 +17,16 @@ void xe_configfs_exit(void);
bool xe_configfs_get_survivability_mode(struct pci_dev *pdev);
void xe_configfs_clear_survivability_mode(struct pci_dev *pdev);
u64 xe_configfs_get_engine_allowed(struct pci_dev *pdev);
+u32 xe_configfs_get_wa_bb_cmds(struct pci_dev *pdev, enum xe_engine_class,
+ const u32 * const *cs);
#else
static inline int xe_configfs_init(void) { return 0; }
static inline void xe_configfs_exit(void) { }
static inline bool xe_configfs_get_survivability_mode(struct pci_dev *pdev) { return false; }
static inline void xe_configfs_clear_survivability_mode(struct pci_dev *pdev) { }
static inline u64 xe_configfs_get_engine_allowed(struct pci_dev *pdev) { return U64_MAX; }
+static inline u32 xe_configfs_get_wa_bb_cmds(struct pci_dev *pdev, enum xe_engine_class,
+ const u32 * const *cs) { return 0; }
#endif
#endif
diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index b489da4ed7ceb..0718b0c04940b 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -16,6 +16,7 @@
#include "regs/xe_lrc_layout.h"
#include "xe_bb.h"
#include "xe_bo.h"
+#include "xe_configfs.h"
#include "xe_device.h"
#include "xe_drm_client.h"
#include "xe_exec_queue_types.h"
@@ -969,7 +970,25 @@ static size_t wa_bb_write_utilization_state(struct xe_lrc *lrc, u32 *cmd0)
return cmd - cmd0;
}
-static void setup_wa_bb(struct xe_lrc *lrc)
+static size_t wa_bb_write_configfs_cmds(struct xe_lrc *lrc,
+ struct xe_hw_engine *hwe, u32 *cmd0)
+{
+ struct xe_device *xe = gt_to_xe(lrc->gt);
+ const u32 *user_cmds;
+ u32 *cmd = cmd0;
+ u32 count;
+
+ count = xe_configfs_get_wa_bb_cmds(to_pci_dev(xe->drm.dev),
+ hwe->class, &user_cmds);
+ if (count) {
+ memcpy(cmd, user_cmds, count * sizeof(u32));
+ cmd += count;
+ }
+
+ return cmd - cmd0;
+}
+
+static void setup_wa_bb(struct xe_lrc *lrc, struct xe_hw_engine *hwe)
{
u32 *cmd, *cmd0;
@@ -977,6 +996,7 @@ static void setup_wa_bb(struct xe_lrc *lrc)
cmd = cmd0;
cmd += wa_bb_write_utilization_state(lrc, cmd);
+ cmd += wa_bb_write_configfs_cmds(lrc, hwe, cmd);
*cmd++ = MI_BATCH_BUFFER_END;
xe_gt_assert(lrc->gt, cmd - cmd0 < lrc->bb_per_ctx_bo->size);
@@ -1139,7 +1159,7 @@ static int xe_lrc_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe,
map = __xe_lrc_start_seqno_map(lrc);
xe_map_write32(lrc_to_xe(lrc), &map, lrc->fence_ctx.next_seqno - 1);
- setup_wa_bb(lrc);
+ setup_wa_bb(lrc, hwe);
return 0;
--
2.49.0
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