✓ CI.checkpatch: success for drm/xe/bo: optimise CCS case for WB pages

[Patchwork]

== Series Details ==

Series: drm/xe/bo: optimise CCS case for WB pages
URL   : https://patchwork.freedesktop.org/series/149122/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
202708c00696422fd217223bb679a353a5936e23
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 6b85ee070bd85d2c06295dbbdd41625cb4992ee1
Author: Matthew Auld <matthew.auld at intel.com>
Date:   Fri May 16 16:38:11 2025 +0100

    drm/xe/bo: optimise CCS case for WB pages
    
    Dealing with CCS state is significant on LNL+, where we end up clearing
    the compression state on every page alloc using the blitter for user
    buffers, including also saving and restoring it when moving between
    domains, plus we need to alloc extra pages to hold the raw CCS state for
    the save step.
    
    However all compression PAT modes, on platforms like LNL, also require
    coh_none, meaning that only WC memory can use compression in the first
    place. With this we can be sneaky and completely ignore CCS for WB
    buffers, which is likely the common case anyway. This would then skip
    all blitter moves/clears between sys <-> tt and then also means we can
    drop the extra CCS pages.
    
    This should be safe since there is no way to interact with the
    compression state (potentially uncleared) without using a PAT enabled
    index (which is rejected at bind), including if trying to be malicious
    and copy the raw CCS state from userpace, which should give back all
    zeroes if the src surface (indirect) is lacking compressed PAT index.
    
    Signed-off-by: Matthew Auld <matthew.auld at intel.com>
    Cc: Satyanarayana K V P <satyanarayana.k.v.p at intel.com>
    Cc: Thomas Hellström <thomas.hellstrom at linux.intel.com>
    Cc: Matthew Brost <matthew.brost at intel.com>
    Reviewed-by: José Roberto de Souza <jose.souza at intel.com>
    Reviewed-by: Satyanarayana K V P <satyanarayana.k.v.p at intel.com>
+ /mt/dim checkpatch 3e019cc3eaffcb7022b9de66871eabdefd6e06ff drm-intel
6b85ee070bd8 drm/xe/bo: optimise CCS case for WB pages