[PATCH 1/1] drm/xe/svm: For atomic operations, continue with page fault handling

[Ghimiray, Himal Prasad]

On 27-05-2025 22:53, Matthew Brost wrote:
> On Tue, May 27, 2025 at 10:03:40PM +0530, Himal Prasad Ghimiray wrote:
>> Ranges might already be valid but lack AE flags in the PTE. Therefore,
> 
> Can you explain how we can get into a situation where the range is valid
> but we haven't set the AE bit in the PTEs?
> 
> Looking at xe_pt.c, xe_atomic_for_vram in particular, we unconditionaly
> set the AE bit for all VRAM allocations. If we get an atomic fault, we
> ensure the range is in VRAM in the xe_svm_range_is_valid check so I
> think the AE bit would always be set here.
> 

Thats true. I broke ctx.dev_mem_only with madvise changes locally due to 
which prefetch in smem and then atomic operations in batch were leading 
to failures. Will address that in next version of madvise series.

This patch is redundant and isn't required.

> Matt
> 
>> continue with rebind of ranges for atomic operations.
>>
>> Cc: Matthew Brost <matthew.brost at intel.com>
>> Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray at intel.com>
>> ---
>>   drivers/gpu/drm/xe/xe_svm.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_svm.c b/drivers/gpu/drm/xe/xe_svm.c
>> index 4432685936ed..d42d5df28115 100644
>> --- a/drivers/gpu/drm/xe/xe_svm.c
>> +++ b/drivers/gpu/drm/xe/xe_svm.c
>> @@ -884,7 +884,7 @@ int xe_svm_handle_pagefault(struct xe_vm *vm, struct xe_vma *vma,
>>   	if (ctx.devmem_only && !range->base.flags.migrate_devmem)
>>   		return -EACCES;
>>   
>> -	if (xe_svm_range_is_valid(range, tile, ctx.devmem_only))
>> +	if (xe_svm_range_is_valid(range, tile, ctx.devmem_only) && !atomic)
>>   		return 0;
>>   
>>   	range_debug(range, "PAGE FAULT");
>> -- 
>> 2.34.1
>>