[PATCH v4 05/11] drm/xe/vrsr: Detect VRSR Capability
Badal Nilawar
badal.nilawar at intel.com
Thu May 29 11:16:48 UTC 2025
From: Anshuman Gupta <anshuman.gupta at intel.com>
Detect VRAM Self Refresh(vrsr) Capability.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta at intel.com>
---
drivers/gpu/drm/xe/regs/xe_regs.h | 3 +++
drivers/gpu/drm/xe/xe_device_types.h | 4 ++++
drivers/gpu/drm/xe/xe_pm.c | 26 ++++++++++++++++++++++++++
3 files changed, 33 insertions(+)
diff --git a/drivers/gpu/drm/xe/regs/xe_regs.h b/drivers/gpu/drm/xe/regs/xe_regs.h
index 3abb17d2ca33..4db486fb310a 100644
--- a/drivers/gpu/drm/xe/regs/xe_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_regs.h
@@ -53,6 +53,9 @@
#define MTL_MPE_FREQUENCY XE_REG(0x13802c)
#define MTL_RPE_MASK REG_GENMASK(8, 0)
+#define VRAM_SR_CAPABILITY XE_REG(0x138144)
+#define VRAM_SR_SUPPORTED REG_BIT(0)
+
#define VF_CAP_REG XE_REG(0x1901f8, XE_REG_OPTION_VF)
#define VF_CAP REG_BIT(0)
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index e2749ed2a61f..3a15b3a252fd 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -512,6 +512,9 @@ struct xe_device {
/** @d3cold.allowed: Indicates if d3cold is a valid device state */
bool allowed;
+ /** @d3cold.vrsr_capable: Indicates if d3cold VRAM Self Refresh is supported */
+ bool vrsr_capable;
+
/**
* @d3cold.vram_threshold:
*
@@ -522,6 +525,7 @@ struct xe_device {
* Default threshold value is 300mb.
*/
u32 vram_threshold;
+
/** @d3cold.lock: protect vram_threshold */
struct mutex lock;
} d3cold;
diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c
index 693866def183..c9395e62d21d 100644
--- a/drivers/gpu/drm/xe/xe_pm.c
+++ b/drivers/gpu/drm/xe/xe_pm.c
@@ -13,13 +13,16 @@
#include <drm/ttm/ttm_placement.h>
#include "display/xe_display.h"
+#include "regs/xe_regs.h"
#include "xe_bo.h"
#include "xe_bo_evict.h"
#include "xe_device.h"
+#include "xe_force_wake.h"
#include "xe_ggtt.h"
#include "xe_gt.h"
#include "xe_guc.h"
#include "xe_irq.h"
+#include "xe_mmio.h"
#include "xe_pcode.h"
#include "xe_pxp.h"
#include "xe_trace.h"
@@ -235,6 +238,28 @@ static bool xe_pm_pci_d3cold_capable(struct xe_device *xe)
return true;
}
+static bool xe_pm_vrsr_capable(struct xe_device *xe)
+{
+ struct xe_mmio *mmio = xe_root_tile_mmio(xe);
+ unsigned int fw_ref;
+ struct xe_gt *gt;
+ u32 val;
+
+ gt = xe_root_mmio_gt(xe);
+
+ if (!xe->info.probe_display)
+ return false;
+
+ fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);
+ if (!fw_ref)
+ return false;
+
+ val = xe_mmio_read32(mmio, VRAM_SR_CAPABILITY);
+ xe_force_wake_put(gt_to_fw(gt), XE_FORCEWAKE_ALL);
+
+ return val & VRAM_SR_SUPPORTED;
+}
+
static void xe_pm_runtime_init(struct xe_device *xe)
{
struct device *dev = xe->drm.dev;
@@ -349,6 +374,7 @@ int xe_pm_init(struct xe_device *xe)
err = xe_pm_set_vram_threshold(xe, vram_threshold);
if (err)
goto err_unregister;
+ xe->d3cold.vrsr_capable = xe_pm_vrsr_capable(xe);
}
xe_pm_runtime_init(xe);
--
2.34.1
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