[PATCH 2/3] drm/xe/regs/xe_pmt: Macros for pcie link state residency offset
Soham Purkait
soham.purkait at intel.com
Thu May 29 19:26:19 UTC 2025
Add pcie link state residency offset macros for L0, L1, L1.2
Signed-off-by: Soham Purkait <soham.purkait at intel.com>
---
drivers/gpu/drm/xe/regs/xe_pmt.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/xe/regs/xe_pmt.h b/drivers/gpu/drm/xe/regs/xe_pmt.h
index b1d4504e4adc..de9c8d29351d 100644
--- a/drivers/gpu/drm/xe/regs/xe_pmt.h
+++ b/drivers/gpu/drm/xe/regs/xe_pmt.h
@@ -21,4 +21,8 @@
#define SG_REMAP_INDEX1 XE_REG(SOC_BASE + 0x08)
#define SG_REMAP_BITS REG_GENMASK(31, 24)
+#define PCIE_LINK_L0_RESIDENCY_COUNTER (0x570)
+#define PCIE_LINK_L1_RESIDENCY_COUNTER (0x578)
+#define PCIE_LINK_L1_2_RESIDENCY_COUNTER (0x580)
+
#endif
--
2.34.1
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