[Libreoffice-commits] .: sal/inc sal/osl
Bjoern Michaelsen
bmichaelsen at kemper.freedesktop.org
Mon Feb 28 08:29:16 PST 2011
sal/inc/osl/armarch.h | 63 +++++++++++++++++++++++++++++++++++++++++++++++++
sal/osl/unx/interlck.c | 37 ++++++++++++++++++++++++++++
2 files changed, 100 insertions(+)
New commits:
commit 83f2c071758ae7d74669d992e272e50057b895ed
Author: Bjoern Michaelsen <bjoern.michaelsen at canonical.com>
Date: Mon Feb 28 17:29:06 2011 +0100
lp#726529: arm optimizations for ARM 6/7 and gcc < 4.6
diff --git a/sal/inc/osl/armarch.h b/sal/inc/osl/armarch.h
new file mode 100644
index 0000000..ab50f5b
--- /dev/null
+++ b/sal/inc/osl/armarch.h
@@ -0,0 +1,63 @@
+/* -*- Mode: C++; tab-width: 4; indent-tabs-mode: nil; c-basic-offset: 4 -*- */
+/* -----------------------------------------------------------------------
+ Copyright (c) 1998, 2008 Red Hat, Inc.
+
+ Permission is hereby granted, free of charge, to any person obtaining
+ a copy of this software and associated documentation files (the
+ ``Software''), to deal in the Software without restriction, including
+ without limitation the rights to use, copy, modify, merge, publish,
+ distribute, sublicense, and/or sell copies of the Software, and to
+ permit persons to whom the Software is furnished to do so, subject to
+ the following conditions:
+
+ The above copyright notice and this permission notice shall be included
+ in all copies or substantial portions of the Software.
+
+ THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND,
+ EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ DEALINGS IN THE SOFTWARE.
+ ----------------------------------------------------------------------- */
+
+// shamelessly copied from libffi src/arm/sysv.h
+#ifndef _OSL_ARMARCH_H_
+#define _OSL_ARMARCH_H_
+#ifdef ARM
+
+#define __ARM_ARCH__ 3
+
+#if defined(__ARM_ARCH_4__) || defined(__ARM_ARCH_4T__)
+# undef __ARM_ARCH__
+# define __ARM_ARCH__ 4
+#endif
+
+#if defined(__ARM_ARCH_5__) || defined(__ARM_ARCH_5T__) \
+ || defined(__ARM_ARCH_5E__) || defined(__ARM_ARCH_5TE__) \
+ || defined(__ARM_ARCH_5TEJ__)
+# undef __ARM_ARCH__
+# define __ARM_ARCH__ 5
+#endif
+
+#if defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) \
+ || defined(__ARM_ARCH_6K__) || defined(__ARM_ARCH_6Z__) \
+ || defined(__ARM_ARCH_6ZK__) || defined(__ARM_ARCH_6T2__) \
+ || defined(__ARM_ARCH_6M__)
+# undef __ARM_ARCH__
+# define __ARM_ARCH__ 6
+#endif
+
+#if defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__) \
+ || defined(__ARM_ARCH_7R__) || defined(__ARM_ARCH_7M__)
+# undef __ARM_ARCH__
+# define __ARM_ARCH__ 7
+#endif
+
+#endif
+#endif
+
+
+/* vim:set shiftwidth=4 softtabstop=4 expandtab: */
diff --git a/sal/osl/unx/interlck.c b/sal/osl/unx/interlck.c
index 6345279..8109f6e 100644
--- a/sal/osl/unx/interlck.c
+++ b/sal/osl/unx/interlck.c
@@ -29,6 +29,7 @@
#include "system.h"
+#include <osl/armarch.h>
#include <osl/interlck.h>
#include <osl/diagnose.h>
@@ -36,6 +37,42 @@
#error please use asm/interlck_sparc.s
#elif defined ( SOLARIS) && defined ( X86 )
#error please use asm/interlck_x86.s
+#elif defined ( ARM ) && (( __GNUC__ < 4 ) || (( __GNUC__ == 4) && ( __GNUC_MINOR__ < 6 ))) && ( __ARM_ARCH__ >= 6)
+oslInterlockedCount SAL_CALL osl_incrementInterlockedCount(oslInterlockedCount* pCount)
+{
+ register oslInterlockedCount nCount __asm__ ("r1");
+ int nResult;
+
+ __asm__ __volatile__ (
+"1: ldrex %0, [%3]\n"
+" add %0, %0, #1\n"
+" strex %1, %0, [%3]\n"
+" teq %1, #0\n"
+" bne 1b"
+ : "=&r" (nCount), "=&r" (nResult), "=m" (*pCount)
+ : "r" (pCount)
+ : "memory");
+
+ return nCount;
+}
+
+oslInterlockedCount SAL_CALL osl_decrementInterlockedCount(oslInterlockedCount* pCount)
+{
+ register oslInterlockedCount nCount __asm__ ("r1");
+ int nResult;
+
+ __asm__ __volatile__ (
+"0: ldrex %0, [%3]\n"
+" sub %0, %0, #1\n"
+" strex %1, %0, [%3]\n"
+" teq %1, #0\n"
+" bne 0b"
+ : "=&r" (nCount), "=&r" (nResult), "=m" (*pCount)
+ : "r" (pCount)
+ : "memory");
+
+ return nCount;
+}
#elif defined ( GCC ) && ( defined ( X86 ) || defined ( X86_64 ) )
/* That's possible on x86-64 too since oslInterlockedCount is a sal_Int32 */
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