[Libva] [PATCH 7/7 v2] add nv12 to rgb conversion in post processing

[Zhao, Halley]

Small update for RGBX

>From d5d51c240716f8cd941dbc4d3c6199e76ac865e8 Mon Sep 17 00:00:00 2001
From: Zhao Halley <halley.zhao at intel.com>
Date: Thu, 19 Jul 2012 13:26:12 +0300
Subject: [PATCH 7/7] add nv12 to rgb conversion in post processing

---
 src/i965_post_processing.c |   59 ++++++++++++++++++++++++++++++++++++++++++++
 src/i965_post_processing.h |    1 +
 2 files changed, 60 insertions(+), 0 deletions(-)

diff --git a/src/i965_post_processing.c b/src/i965_post_processing.c
index 21dee74..5ea5dc3 100755
--- a/src/i965_post_processing.c
+++ b/src/i965_post_processing.c
@@ -111,6 +111,10 @@ static const uint32_t pp_rgbx_load_save_nv12_gen5[][4] = {
 #include "shaders/post_processing/gen5_6/rgbx_load_save_nv12.g4b.gen5"
 };
 
+static const uint32_t pp_nv12_load_save_rgbx_gen5[][4] = {
+#include "shaders/post_processing/gen5_6/nv12_load_save_rgbx.g4b.gen5"
+};
+
 static VAStatus pp_null_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context,
                                    const struct i965_surface *src_surface,
                                    const VARectangle *src_rect,
@@ -323,6 +327,18 @@ static struct pp_module pp_modules_gen5[] = {
         pp_plx_load_save_plx_initialize,
     },
             
+    {
+        {
+            "NV12_RGBX module",
+            PP_NV12_LOAD_SAVE_RGBX,
+            pp_nv12_load_save_rgbx_gen5,
+            sizeof(pp_nv12_load_save_rgbx_gen5),
+            NULL,
+        },
+    
+        pp_plx_load_save_plx_initialize,
+    },
+                    
 };
 
 static const uint32_t pp_null_gen6[][4] = {
@@ -381,6 +397,10 @@ static const uint32_t pp_rgbx_load_save_nv12_gen6[][4] = {
 #include "shaders/post_processing/gen5_6/rgbx_load_save_nv12.g6b"
 };
 
+static const uint32_t pp_nv12_load_save_rgbx_gen6[][4] = {
+#include "shaders/post_processing/gen5_6/nv12_load_save_rgbx.g6b"
+};
+
 static struct pp_module pp_modules_gen6[] = {
     {
         {
@@ -549,6 +569,17 @@ static struct pp_module pp_modules_gen6[] = {
         pp_plx_load_save_plx_initialize,
     },
 
+    {
+        {
+            "NV12_RGBX module",
+            PP_NV12_LOAD_SAVE_RGBX,
+            pp_nv12_load_save_rgbx_gen6,
+            sizeof(pp_nv12_load_save_rgbx_gen6),
+            NULL,
+        },
+    
+        pp_plx_load_save_plx_initialize,
+    },
 };
 
 static const uint32_t pp_null_gen7[][4] = {
@@ -598,6 +629,8 @@ static const uint32_t pp_pa_load_save_pl3_gen7[][4] = {
 };
 static const uint32_t pp_rgbx_load_save_nv12_gen7[][4] = {
 };
+static const uint32_t pp_nv12_load_save_rgbx_gen7[][4] = {
+};
 
 static VAStatus gen7_pp_plx_avs_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context,
                                            const struct i965_surface *src_surface,
@@ -786,6 +819,18 @@ static struct pp_module pp_modules_gen7[] = {
         pp_plx_load_save_plx_initialize,
     },
 
+    {
+        {
+            "NV12_RGBX module",
+            PP_NV12_LOAD_SAVE_RGBX,
+            pp_nv12_load_save_rgbx_gen7,
+            sizeof(pp_nv12_load_save_rgbx_gen7),
+            NULL,
+        },
+    
+        pp_plx_load_save_plx_initialize,
+    },
+            
 };
 
 static int
@@ -4199,6 +4244,20 @@ i965_image_pl2_processing(VADriverContextP ctx,
                                                  dst_rect,
                                                  PP_NV12_LOAD_SAVE_PA,
                                                      NULL);
+    } else if (fourcc == VA_FOURCC('B', 'G', 'R', 'X') || 
+               fourcc == VA_FOURCC('B', 'G', 'R', 'A') ||
+               fourcc == VA_FOURCC('R', 'G', 'B', 'X') ||
+               fourcc == VA_FOURCC('R', 'G', 'B', 'A') ) {
+        vaStatus = i965_post_processing_internal(ctx, i965->pp_context,
+                                      src_surface,
+                                      src_rect,
+                                      dst_surface,
+                                      dst_rect,
+                                      PP_NV12_LOAD_SAVE_RGBX,
+                                      NULL);
+    } else {
+        assert(0);
+        return VA_STATUS_ERROR_UNKNOWN;
     }
 
     intel_batchbuffer_flush(pp_context->batch);
diff --git a/src/i965_post_processing.h b/src/i965_post_processing.h
index 0ea87d2..023fa3c 100755
--- a/src/i965_post_processing.h
+++ b/src/i965_post_processing.h
@@ -52,6 +52,7 @@ enum
     PP_PA_LOAD_SAVE_NV12,
     PP_PA_LOAD_SAVE_PL3,
     PP_RGBX_LOAD_SAVE_NV12,
+    PP_NV12_LOAD_SAVE_RGBX,
     NUM_PP_MODULES,
 };
 
-- 
1.7.4.1