[Libva] [PATCH 1/2] batch: factor out MI_FLUSH_DW batch buffer construction.
Gwenole Beauchesne
gb.devel at gmail.com
Wed May 14 00:47:10 PDT 2014
Simplify the construction of the MI_FLUSH_DW command stream. Use ring
buffer generic variants of BEGIN, OUT, ADVANCE batch functions.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne at intel.com>
---
src/intel_batchbuffer.c | 33 ++++++++++-----------------------
1 file changed, 10 insertions(+), 23 deletions(-)
diff --git a/src/intel_batchbuffer.c b/src/intel_batchbuffer.c
index 9dc496d..bc564d5 100644
--- a/src/intel_batchbuffer.c
+++ b/src/intel_batchbuffer.c
@@ -247,29 +247,16 @@ intel_batchbuffer_emit_mi_flush(struct intel_batchbuffer *batch)
}
} else {
- if (batch->flag == I915_EXEC_BLT) {
- BEGIN_BLT_BATCH(batch, 4);
- OUT_BLT_BATCH(batch, MI_FLUSH_DW);
- OUT_BLT_BATCH(batch, 0);
- OUT_BLT_BATCH(batch, 0);
- OUT_BLT_BATCH(batch, 0);
- ADVANCE_BLT_BATCH(batch);
- }else if (batch->flag == I915_EXEC_VEBOX) {
- BEGIN_VEB_BATCH(batch, 4);
- OUT_VEB_BATCH(batch, MI_FLUSH_DW);
- OUT_VEB_BATCH(batch, 0);
- OUT_VEB_BATCH(batch, 0);
- OUT_VEB_BATCH(batch, 0);
- ADVANCE_VEB_BATCH(batch);
- } else {
- assert(batch->flag == I915_EXEC_BSD);
- BEGIN_BCS_BATCH(batch, 4);
- OUT_BCS_BATCH(batch, MI_FLUSH_DW | MI_FLUSH_DW_VIDEO_PIPELINE_CACHE_INVALIDATE);
- OUT_BCS_BATCH(batch, 0);
- OUT_BCS_BATCH(batch, 0);
- OUT_BCS_BATCH(batch, 0);
- ADVANCE_BCS_BATCH(batch);
- }
+ uint32_t cmd = MI_FLUSH_DW;
+ if (batch->flag == I915_EXEC_BSD)
+ cmd |= MI_FLUSH_DW_VIDEO_PIPELINE_CACHE_INVALIDATE;
+
+ __BEGIN_BATCH(batch, 4, batch->flag);
+ __OUT_BATCH(batch, cmd);
+ __OUT_BATCH(batch, 0);
+ __OUT_BATCH(batch, 0);
+ __OUT_BATCH(batch, 0);
+ __ADVANCE_BATCH(batch);
}
} else {
if (batch->flag == I915_EXEC_RENDER) {
--
1.8.3.2
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