[Libva] [PATCH V1][libva-intel-driver] Add the write_enabled flag of GPE media surface state
Xiang, Haihao
haihao.xiang at intel.com
Wed Aug 24 04:46:35 UTC 2016
Applied.
Thanks
Haihao
> Fix this issue: https://bugs.freedesktop.org/show_bug.cgi?id=94607
>
> Signed-off-by: peng.chen <peng.c.chen at intel.com>
> ---
> src/gen6_vme.c | 3 ++-
> src/gen6_vme.h | 6 ++++--
> src/gen75_vme.c | 6 ++++--
> src/gen75_vpp_gpe.c | 24 ++++++++++++++++--------
> src/gen7_vme.c | 3 ++-
> src/gen8_vme.c | 6 ++++--
> src/gen9_vme.c | 6 ++++--
> src/i965_gpe_utils.c | 25 +++++++++++++++----------
> src/i965_gpe_utils.h | 15 ++++++++++-----
> 9 files changed, 61 insertions(+), 33 deletions(-)
>
> diff --git a/src/gen6_vme.c b/src/gen6_vme.c
> index 8c8667e..45cc30e 100644
> --- a/src/gen6_vme.c
> +++ b/src/gen6_vme.c
> @@ -124,7 +124,8 @@
> gen6_vme_media_source_surface_state(VADriverContextP ctx,
> &vme_context-
> >gpe_context,
> obj_surface,
> BINDING_TABLE_OFFSET(ind
> ex),
> - SURFACE_STATE_OFFSET(ind
> ex));
> + SURFACE_STATE_OFFSET(ind
> ex),
> + 0);
> }
>
> static void
> diff --git a/src/gen6_vme.h b/src/gen6_vme.h
> index 6cf35f9..e8f4742 100644
> --- a/src/gen6_vme.h
> +++ b/src/gen6_vme.h
> @@ -72,7 +72,8 @@ struct gen6_vme_context
> struct i965_gpe_context
> *gpe_context,
> struct object_surface
> *obj_surface,
> unsigned long
> binding_table_offset,
> - unsigned long
> surface_state_offset);
> + unsigned long
> surface_state_offset,
> + int write_enabled);
> void (*vme_buffer_suface_setup)(VADriverContextP ctx,
> struct i965_gpe_context
> *gpe_context,
> struct i965_buffer_surface
> *buffer_surface,
> @@ -82,7 +83,8 @@ struct gen6_vme_context
> struct i965_gpe_context
> *gpe_context,
> struct object_surface
> *obj_surface,
> unsigned long
> binding_table_offset,
> - unsigned long
> surface_state_offset);
> + unsigned long
> surface_state_offset,
> + int write_enabled);
> void *vme_state_message;
> unsigned int h264_level;
> unsigned int hevc_level;
> diff --git a/src/gen75_vme.c b/src/gen75_vme.c
> index 05efff8..2f9db57 100644
> --- a/src/gen75_vme.c
> +++ b/src/gen75_vme.c
> @@ -164,7 +164,8 @@
> gen75_vme_media_source_surface_state(VADriverContextP ctx,
> &vme_context-
> >gpe_context,
> obj_surface,
> BINDING_TABLE_OFFSET(ind
> ex),
> - SURFACE_STATE_OFFSET(ind
> ex));
> + SURFACE_STATE_OFFSET(ind
> ex),
> + 0);
> }
>
> static void
> @@ -179,7 +180,8 @@
> gen75_vme_media_chroma_source_surface_state(VADriverContextP ctx,
> &vme_context-
> >gpe_context,
> obj_surface,
> BINDING_TABLE_OFFSET
> (index),
> - SURFACE_STATE_OFFSET
> (index));
> + SURFACE_STATE_OFFSET
> (index),
> + 0);
> }
>
> static void
> diff --git a/src/gen75_vpp_gpe.c b/src/gen75_vpp_gpe.c
> index 5486128..9850c1c 100644
> --- a/src/gen75_vpp_gpe.c
> +++ b/src/gen75_vpp_gpe.c
> @@ -137,13 +137,15 @@
> gen75_gpe_process_surfaces_setup(VADriverContextP ctx,
> &vpp_gpe_ctx->gpe_ctx,
> obj_surface,
> BINDING_TABLE_OFFSET_GEN7(
> i),
> - SURFACE_STATE_OFFSET_GEN7(
> i));
> + SURFACE_STATE_OFFSET_GEN7(
> i),
> + 0);
>
> gen75_gpe_media_chroma_surface_setup(ctx,
> &vpp_gpe_ctx->gpe_ctx,
> obj_surface,
> BINDING_TABLE_OFFSET_GEN7(
> i + 1),
> - SURFACE_STATE_OFFSET_GEN7(
> i + 1));
> + SURFACE_STATE_OFFSET_GEN7(
> i + 1),
> + 0);
> }
>
> /* Binding output NV12 surface(Luma + Chroma) */
> @@ -153,12 +155,14 @@
> gen75_gpe_process_surfaces_setup(VADriverContextP ctx,
> &vpp_gpe_ctx->gpe_ctx,
> obj_surface,
> BINDING_TABLE_OFFSET_GEN7(input_
> surface_sum),
> - SURFACE_STATE_OFFSET_GEN7(input_
> surface_sum));
> + SURFACE_STATE_OFFSET_GEN7(input_
> surface_sum),
> + 1);
> gen75_gpe_media_chroma_surface_setup(ctx,
> &vpp_gpe_ctx->gpe_ctx,
> obj_surface,
> BINDING_TABLE_OFFSET_GEN7(input_
> surface_sum + 1),
> - SURFACE_STATE_OFFSET_GEN7(input_
> surface_sum + 1));
> + SURFACE_STATE_OFFSET_GEN7(input_
> surface_sum + 1),
> + 1);
> /* Bind kernel return buffer surface */
> gen7_gpe_buffer_suface_setup(ctx,
> &vpp_gpe_ctx->gpe_ctx,
> @@ -361,13 +365,15 @@
> gen8_gpe_process_surfaces_setup(VADriverContextP ctx,
> &vpp_gpe_ctx->gpe_ctx,
> obj_surface,
> BINDING_TABLE_OFFSET_GEN8(
> i),
> - SURFACE_STATE_OFFSET_GEN8(
> i));
> + SURFACE_STATE_OFFSET_GEN8(
> i),
> + 0);
>
> gen8_gpe_media_chroma_surface_setup(ctx,
> &vpp_gpe_ctx->gpe_ctx,
> obj_surface,
> BINDING_TABLE_OFFSET_GEN8(
> i + 1),
> - SURFACE_STATE_OFFSET_GEN8(
> i + 1));
> + SURFACE_STATE_OFFSET_GEN8(
> i + 1),
> + 0);
> }
>
> /* Binding output NV12 surface(Luma + Chroma) */
> @@ -377,12 +383,14 @@
> gen8_gpe_process_surfaces_setup(VADriverContextP ctx,
> &vpp_gpe_ctx->gpe_ctx,
> obj_surface,
> BINDING_TABLE_OFFSET_GEN8(input_
> surface_sum),
> - SURFACE_STATE_OFFSET_GEN8(input_
> surface_sum));
> + SURFACE_STATE_OFFSET_GEN8(input_
> surface_sum),
> + 1);
> gen8_gpe_media_chroma_surface_setup(ctx,
> &vpp_gpe_ctx->gpe_ctx,
> obj_surface,
> BINDING_TABLE_OFFSET_GEN8(input_
> surface_sum + 1),
> - SURFACE_STATE_OFFSET_GEN8(input_
> surface_sum + 1));
> + SURFACE_STATE_OFFSET_GEN8(input_
> surface_sum + 1),
> + 1);
> /* Bind kernel return buffer surface */
> gen7_gpe_buffer_suface_setup(ctx,
> &vpp_gpe_ctx->gpe_ctx,
> diff --git a/src/gen7_vme.c b/src/gen7_vme.c
> index 899acd3..897d169 100644
> --- a/src/gen7_vme.c
> +++ b/src/gen7_vme.c
> @@ -175,7 +175,8 @@
> gen7_vme_media_source_surface_state(VADriverContextP ctx,
> &vme_context-
> >gpe_context,
> obj_surface,
> BINDING_TABLE_OFFSET(ind
> ex),
> - SURFACE_STATE_OFFSET(ind
> ex));
> + SURFACE_STATE_OFFSET(ind
> ex),
> + 0);
> }
>
> static void
> diff --git a/src/gen8_vme.c b/src/gen8_vme.c
> index d2f68cb..2a93d1e 100644
> --- a/src/gen8_vme.c
> +++ b/src/gen8_vme.c
> @@ -173,7 +173,8 @@
> gen8_vme_media_source_surface_state(VADriverContextP ctx,
> &vme_context-
> >gpe_context,
> obj_surface,
> BINDING_TABLE_OFFSET(ind
> ex),
> - SURFACE_STATE_OFFSET(ind
> ex));
> + SURFACE_STATE_OFFSET(ind
> ex),
> + 0);
> }
>
> static void
> @@ -188,7 +189,8 @@
> gen8_vme_media_chroma_source_surface_state(VADriverContextP ctx,
> &vme_context-
> >gpe_context,
> obj_surface,
> BINDING_TABLE_OFFSET
> (index),
> - SURFACE_STATE_OFFSET
> (index));
> + SURFACE_STATE_OFFSET
> (index),
> + 0);
> }
>
> static void
> diff --git a/src/gen9_vme.c b/src/gen9_vme.c
> index 8dde7e7..1625c2b 100644
> --- a/src/gen9_vme.c
> +++ b/src/gen9_vme.c
> @@ -210,7 +210,8 @@
> gen9_vme_media_source_surface_state(VADriverContextP ctx,
> &vme_context-
> >gpe_context,
> obj_surface,
> BINDING_TABLE_OFFSET(ind
> ex),
> - SURFACE_STATE_OFFSET(ind
> ex));
> + SURFACE_STATE_OFFSET(ind
> ex),
> + 0);
> }
>
> static void
> @@ -225,7 +226,8 @@
> gen9_vme_media_chroma_source_surface_state(VADriverContextP ctx,
> &vme_context-
> >gpe_context,
> obj_surface,
> BINDING_TABLE_OFFSET
> (index),
> - SURFACE_STATE_OFFSET
> (index));
> + SURFACE_STATE_OFFSET
> (index),
> + 0);
> }
>
> static void
> diff --git a/src/i965_gpe_utils.c b/src/i965_gpe_utils.c
> index d911196..3ec164d 100644
> --- a/src/i965_gpe_utils.c
> +++ b/src/i965_gpe_utils.c
> @@ -425,7 +425,8 @@ i965_gpe_media_rw_surface_setup(VADriverContextP
> ctx,
> struct i965_gpe_context
> *gpe_context,
> struct object_surface *obj_surface,
> unsigned long binding_table_offset,
> - unsigned long surface_state_offset)
> + unsigned long surface_state_offset,
> + int write_enabled)
> {
> struct i965_surface_state *ss;
> dri_bo *bo;
> @@ -437,7 +438,7 @@ i965_gpe_media_rw_surface_setup(VADriverContextP
> ctx,
> ss = (struct i965_surface_state *)((char *)bo->virtual +
> surface_state_offset);
> i965_gpe_set_media_rw_surface_state(ctx, obj_surface, ss);
> dri_bo_emit_reloc(bo,
> - I915_GEM_DOMAIN_RENDER, 0,
> + I915_GEM_DOMAIN_RENDER, write_enabled ?
> I915_GEM_DOMAIN_RENDER : 0,
> 0,
> surface_state_offset + offsetof(struct
> i965_surface_state, ss1),
> obj_surface->bo);
> @@ -616,7 +617,8 @@ gen7_gpe_media_rw_surface_setup(VADriverContextP
> ctx,
> struct i965_gpe_context
> *gpe_context,
> struct object_surface *obj_surface,
> unsigned long binding_table_offset,
> - unsigned long surface_state_offset)
> + unsigned long surface_state_offset,
> + int write_enabled)
> {
> struct gen7_surface_state *ss;
> dri_bo *bo;
> @@ -628,7 +630,7 @@ gen7_gpe_media_rw_surface_setup(VADriverContextP
> ctx,
> ss = (struct gen7_surface_state *)((char *)bo->virtual +
> surface_state_offset);
> gen7_gpe_set_media_rw_surface_state(ctx, obj_surface, ss);
> dri_bo_emit_reloc(bo,
> - I915_GEM_DOMAIN_RENDER, 0,
> + I915_GEM_DOMAIN_RENDER, write_enabled ?
> I915_GEM_DOMAIN_RENDER : 0,
> 0,
> surface_state_offset + offsetof(struct
> gen7_surface_state, ss1),
> obj_surface->bo);
> @@ -642,7 +644,8 @@
> gen75_gpe_media_chroma_surface_setup(VADriverContextP ctx,
> struct i965_gpe_context
> *gpe_context,
> struct object_surface *obj_surface,
> unsigned long binding_table_offset,
> - unsigned long surface_state_offset)
> + unsigned long surface_state_offset,
> + int write_enabled)
> {
> struct gen7_surface_state *ss;
> dri_bo *bo;
> @@ -657,7 +660,7 @@
> gen75_gpe_media_chroma_surface_setup(VADriverContextP ctx,
> ss = (struct gen7_surface_state *)((char *)bo->virtual +
> surface_state_offset);
> gen75_gpe_set_media_chroma_surface_state(ctx, obj_surface, ss);
> dri_bo_emit_reloc(bo,
> - I915_GEM_DOMAIN_RENDER, 0,
> + I915_GEM_DOMAIN_RENDER, write_enabled ?
> I915_GEM_DOMAIN_RENDER : 0,
> cbcr_offset,
> surface_state_offset + offsetof(struct
> gen7_surface_state, ss1),
> obj_surface->bo);
> @@ -853,7 +856,8 @@ gen8_gpe_media_rw_surface_setup(VADriverContextP
> ctx,
> struct i965_gpe_context
> *gpe_context,
> struct object_surface *obj_surface,
> unsigned long binding_table_offset,
> - unsigned long surface_state_offset)
> + unsigned long surface_state_offset,
> + int write_enabled)
> {
> struct gen8_surface_state *ss;
> dri_bo *bo;
> @@ -865,7 +869,7 @@ gen8_gpe_media_rw_surface_setup(VADriverContextP
> ctx,
> ss = (struct gen8_surface_state *)((char *)bo->virtual +
> surface_state_offset);
> gen8_gpe_set_media_rw_surface_state(ctx, obj_surface, ss);
> dri_bo_emit_reloc(bo,
> - I915_GEM_DOMAIN_RENDER, 0,
> + I915_GEM_DOMAIN_RENDER, write_enabled ?
> I915_GEM_DOMAIN_RENDER : 0,
> 0,
> surface_state_offset + offsetof(struct
> gen8_surface_state, ss8),
> obj_surface->bo);
> @@ -879,7 +883,8 @@
> gen8_gpe_media_chroma_surface_setup(VADriverContextP ctx,
> struct i965_gpe_context
> *gpe_context,
> struct object_surface *obj_surface,
> unsigned long binding_table_offset,
> - unsigned long surface_state_offset)
> + unsigned long surface_state_offset,
> + int write_enabled)
> {
> struct gen8_surface_state *ss;
> dri_bo *bo;
> @@ -894,7 +899,7 @@
> gen8_gpe_media_chroma_surface_setup(VADriverContextP ctx,
> ss = (struct gen8_surface_state *)((char *)bo->virtual +
> surface_state_offset);
> gen8_gpe_set_media_chroma_surface_state(ctx, obj_surface, ss);
> dri_bo_emit_reloc(bo,
> - I915_GEM_DOMAIN_RENDER, 0,
> + I915_GEM_DOMAIN_RENDER, write_enabled ?
> I915_GEM_DOMAIN_RENDER : 0,
> cbcr_offset,
> surface_state_offset + offsetof(struct
> gen8_surface_state, ss8),
> obj_surface->bo);
> diff --git a/src/i965_gpe_utils.h b/src/i965_gpe_utils.h
> index cb7f7bf..39a6fad 100644
> --- a/src/i965_gpe_utils.h
> +++ b/src/i965_gpe_utils.h
> @@ -257,7 +257,8 @@ void
> i965_gpe_media_rw_surface_setup(VADriverContextP ctx,
> struct i965_gpe_context
> *gpe_context,
> struct object_surface
> *obj_surface,
> unsigned long
> binding_table_offset,
> - unsigned long
> surface_state_offset);
> + unsigned long
> surface_state_offset,
> + int write_enabled);
> void i965_gpe_buffer_suface_setup(VADriverContextP ctx,
> struct i965_gpe_context
> *gpe_context,
> struct i965_buffer_surface
> *buffer_surface,
> @@ -272,7 +273,8 @@ void
> gen7_gpe_media_rw_surface_setup(VADriverContextP ctx,
> struct i965_gpe_context
> *gpe_context,
> struct object_surface
> *obj_surface,
> unsigned long
> binding_table_offset,
> - unsigned long
> surface_state_offset);
> + unsigned long
> surface_state_offset,
> + int write_enabled);
> void gen7_gpe_buffer_suface_setup(VADriverContextP ctx,
> struct i965_gpe_context
> *gpe_context,
> struct i965_buffer_surface
> *buffer_surface,
> @@ -282,7 +284,8 @@ void
> gen75_gpe_media_chroma_surface_setup(VADriverContextP ctx,
> struct i965_gpe_context
> *gpe_context,
> struct object_surface
> *obj_surface,
> unsigned long
> binding_table_offset,
> - unsigned long
> surface_state_offset);
> + unsigned long
> surface_state_offset,
> + int write_enabled);
>
> extern void gen8_gpe_surface2_setup(VADriverContextP ctx,
> struct i965_gpe_context *gpe_context,
> @@ -293,7 +296,8 @@ extern void
> gen8_gpe_media_rw_surface_setup(VADriverContextP ctx,
> struct i965_gpe_context
> *gpe_context,
> struct object_surface
> *obj_surface,
> unsigned long
> binding_table_offset,
> - unsigned long
> surface_state_offset);
> + unsigned long
> surface_state_offset,
> + int write_enabled);
> extern void gen8_gpe_buffer_suface_setup(VADriverContextP ctx,
> struct i965_gpe_context
> *gpe_context,
> struct i965_buffer_surface
> *buffer_surface,
> @@ -303,7 +307,8 @@ extern void
> gen8_gpe_media_chroma_surface_setup(VADriverContextP ctx,
> struct i965_gpe_context
> *gpe_context,
> struct object_surface
> *obj_surface,
> unsigned long
> binding_table_offset,
> - unsigned long
> surface_state_offset);
> + unsigned long
> surface_state_offset,
> + int write_enabled);
>
> void gen8_gpe_pipeline_setup(VADriverContextP ctx,
> struct i965_gpe_context *gpe_context,
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