[Mesa-announce] Mesa 17.3.3 release candidate
Juan A. Suarez Romero
jasuarez at igalia.com
Tue Jan 16 13:01:51 UTC 2018
The candidate for the Mesa 17.3.3 is now available. Currently we have:
- 32 queued
- 1 nominated (outstanding)
- and 2 rejected patches
The current queue consists of:
The RADV driver gets several fixes around the resolve pass. It also gets fixes
to solve a mpv hang, pipeline statistics, and other few issues.
Worth to note that several of these the fixes improves the RADV VEGA support.
Intel's ANV driver is also getting different fixes. Couple of this fixes solves
several issues related with GPU hangs and rendering errors. Others fixes minor
We have a fix related with DRI3 that avoids freeing renderbuffers when they are
in use, which was causing several issues.
Finally, the etnaviv, swrast and radeonsi are getting a few fixes each.
Take a look at section "Mesa stable queue" for more information.
Testing reports/general approval
Any testing reports (or general approval of the state of the branch)
will be greatly appreciated.
The plan is to have 17.3.3 this Thursday (18th of January), around or
shortly after 11:00 GMT.
If you have any questions or suggestions - be that about the current
patch queue or otherwise, please go ahead.
Mesa stable queue
Gert Wollny (1):
r600/shader: Initialize max_driver_temp_used correctly for the first time
Alex Smith (3):
anv: Make sure state on primary is correct after CmdExecuteCommands
anv: Take write mask into account in has_color_buffer_write_enabled
anv: Add missing unlock in anv_scratch_pool_alloc
Andres Gomez (1):
anv: Import mako templates only during execution of anv_extensions
Bas Nieuwenhuizen (11):
ac/nir: Sanitize location_frac for local variables.
radv: Invalidate L1 for VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT.
ac/nir: Handle loading data from compact arrays.
radv: Allow writing 0 scissors.
radv: Use correct HTILE expanded words.
Revert "radv/gfx9: fix block compression texture views."
radv: Always use fragment resolve if dest uses DCC.
radv: Use correct framebuffer size for partial FS resolves.
radv: Fix fragment resolve destination offset.
radv: Flush caches before subpass resolve.
radv: Invert condition for all samples identical during resolve.
Dave Airlie (8):
radv/gfx9: use correct swizzle parameter to work out border swizzle.
radv/gfx9: use a bigger hammer to flush cb/db caches.
radv/gfx9: fix block compression texture views.
radv/gfx9: fix buffer to image for 3d images on compute queues
radv/gfx9: fix 3d image clears on compute queues
radv/gfx9: fix 3d image to image transfers on compute queues.
radv: fix pipeline statistics end query on compute queue
radv: fix events on compute queues.
Emil Velikov (1):
docs: add sha256 checksums for 17.3.2
Florian Will (1):
glsl: Respect std430 layout in lower_buffer_access
Józef Kucia (1):
radeonsi: fix alpha-to-coverage if color writes are disabled
Kenneth Graunke (2):
i965: Torch public intel_batchbuffer_emit_dword/float helpers.
i965: Require space for MI_BATCHBUFFER_END.
Lucas Stach (1):
etnaviv: disable in-place resolve for non-supertiled surfaces
Samuel Iglesias Gonsálvez (1):
anv: VkDescriptorSetLayoutBinding can have descriptorCount == 0
Thomas Hellstrom (1):
loader/dri3: Avoid freeing renderbuffers in use
Tim Rowley (1):
swr/rast: fix invalid sign masks in avx512 simdlib code
Jason Ekstrand (2):
intel/fs: Use the original destination region for int MUL lowering
This commit is causing a regression (see https://bugs.freedesktop.org/show_bug.cgi?id=103626).
i965/fs: Use UW types when using V immediates
The commit addresses earlier commit 6132992cdb which did not land in branch.
More information about the mesa-announce