Mesa (9.0): i965: Fix regression in depth texture rendering on pre-SNB

[Ian Romanick]

Module: Mesa
Branch: 9.0
Commit: 5fe5aa8e55a8db0b80f6ff9838bad47ce0406fd0
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=5fe5aa8e55a8db0b80f6ff9838bad47ce0406fd0

Author: Ian Romanick <ian.d.romanick at intel.com>
Date:   Fri Oct 19 14:04:08 2012 -0700

i965: Fix regression in depth texture rendering on pre-SNB

This was introduced by commit 24db6d6 (cherry-picked from a683012).  The
original patch fixed potential GPU hangs on SNB, and it caused some
rendering regressions there.  The benefits outweigh the costs.

However, the work-around is not necessary for pre-SNB chipsets.
Applying the work-around there gives rendering regressions with no
benefit.  This patch disables the work-around on pre-SNB chipsets.

Without the original patch, the piglit test
depthstencil-render-miplevels would reliably hang an SNB GPU.  On ILK
this test would not hang, and it does not hang with this patch.

NOTE: This is a candidate for the 8.0 and 9.0 branches

Signed-off-by: Ian Romanick <ian.d.romanick at intel.com>
Acked-by: Kenneth Graunke <kenneth at whitecape.org>
Acked-by: Paul Berry <stereotype441 at gmail.com>

---

 src/mesa/drivers/dri/i965/brw_misc_state.c |    6 ++++--
 1 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c
index 6dfa08e..4799af2 100644
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -413,8 +413,10 @@ static void emit_depthbuffer(struct brw_context *brw)
        * tile_x and tile_y to 0.  This is a temporary workaround until we come
        * up with a better solution.
        */
-      tile_x &= ~7;
-      tile_y &= ~7;
+      if (intel->gen >= 6) {
+         tile_x &= ~7;
+         tile_y &= ~7;
+      }
 
       BEGIN_BATCH(len);
       OUT_BATCH(_3DSTATE_DEPTH_BUFFER << 16 | (len - 2));