Mesa (master): i965: Add BRW_REGISTER_TYPE_DF.
Kenneth Graunke
kwg at kemper.freedesktop.org
Fri Dec 20 20:36:07 UTC 2013
Module: Mesa
Branch: master
Commit: 15b9aa22d7d40456d59a9686be302ef0078e083f
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=15b9aa22d7d40456d59a9686be302ef0078e083f
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Tue Dec 10 01:49:18 2013 -0800
i965: Add BRW_REGISTER_TYPE_DF.
Ivybridge, Baytrail, and Haswell support double float register types,
but do not support them as immediate values.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
Reviewed-by: Eric Anholt <eric at anholt.net>
---
src/mesa/drivers/dri/i965/brw_defines.h | 1 +
src/mesa/drivers/dri/i965/brw_eu_emit.c | 3 +++
src/mesa/drivers/dri/i965/brw_reg.h | 2 ++
3 files changed, 6 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index e6a3424..5ee6fb7 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -990,6 +990,7 @@ operator|(brw_urb_write_flags x, brw_urb_write_flags y)
#define BRW_HW_REG_NON_IMM_TYPE_UB 4
#define BRW_HW_REG_NON_IMM_TYPE_B 5
+#define GEN7_HW_REG_NON_IMM_TYPE_DF 6
#define BRW_HW_REG_IMM_TYPE_UV 4 /* Gen6+ packed unsigned immediate vector */
#define BRW_HW_REG_IMM_TYPE_VF 5 /* packed float immediate vector */
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index b7a88931..90fde1d 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -122,6 +122,7 @@ brw_reg_type_to_hw_type(const struct brw_context *brw,
[BRW_REGISTER_TYPE_UV] = BRW_HW_REG_IMM_TYPE_UV,
[BRW_REGISTER_TYPE_VF] = BRW_HW_REG_IMM_TYPE_VF,
[BRW_REGISTER_TYPE_V] = BRW_HW_REG_IMM_TYPE_V,
+ [BRW_REGISTER_TYPE_DF] = -1,
};
assert(type < ARRAY_SIZE(imm_hw_types));
assert(imm_hw_types[type] != -1);
@@ -139,9 +140,11 @@ brw_reg_type_to_hw_type(const struct brw_context *brw,
[BRW_REGISTER_TYPE_UV] = -1,
[BRW_REGISTER_TYPE_VF] = -1,
[BRW_REGISTER_TYPE_V] = -1,
+ [BRW_REGISTER_TYPE_DF] = GEN7_HW_REG_NON_IMM_TYPE_DF,
};
assert(type < ARRAY_SIZE(hw_types));
assert(hw_types[type] != -1);
+ assert(brw->gen >= 7 || type < BRW_REGISTER_TYPE_DF);
return hw_types[type];
}
}
diff --git a/src/mesa/drivers/dri/i965/brw_reg.h b/src/mesa/drivers/dri/i965/brw_reg.h
index 8734958..1e6ed6b 100644
--- a/src/mesa/drivers/dri/i965/brw_reg.h
+++ b/src/mesa/drivers/dri/i965/brw_reg.h
@@ -105,6 +105,8 @@ enum brw_reg_type {
BRW_REGISTER_TYPE_V,
BRW_REGISTER_TYPE_VF,
/** @} */
+
+ BRW_REGISTER_TYPE_DF, /* Gen7+ (no immediates until Gen8+) */
};
unsigned brw_reg_type_to_hw_type(const struct brw_context *brw,
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