Mesa (master): i965: Store QPitch in intel_mipmap_tree.

Kenneth Graunke kwg at kemper.freedesktop.org
Fri Dec 20 20:39:35 UTC 2013


Module: Mesa
Branch: master
Commit: b97fa1e75b77a8f5e8b963ea792afeb02efe0419
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b97fa1e75b77a8f5e8b963ea792afeb02efe0419

Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Fri Dec 13 16:10:02 2013 -0800

i965: Store QPitch in intel_mipmap_tree.

Broadwell allows us to specify an arbitrary value for QPitch, rather
than baking a specific formula into the hardware and requiring software
to lay things out to match.  The only restriction is that the software
provided QPitch needs to be large enough so successive array slices do
not overlap.

In order to support this flexibility, software needs to specify QPitch
in a bunch of packets.  Storing QPitch makes that easy, and allows us to
adjust it in a single place should we wish to change it in the future.

Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Paul Berry <stereotype441 at gmail.com>

---

 src/mesa/drivers/dri/i965/brw_tex_layout.c    |   11 +++++------
 src/mesa/drivers/dri/i965/intel_mipmap_tree.h |    5 +++++
 2 files changed, 10 insertions(+), 6 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c
index 16af19f..a0f584b 100644
--- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
+++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
@@ -238,26 +238,25 @@ static void
 brw_miptree_layout_texture_array(struct brw_context *brw,
 				 struct intel_mipmap_tree *mt)
 {
-   unsigned qpitch = 0;
    int h0, h1;
 
    h0 = ALIGN(mt->physical_height0, mt->align_h);
    h1 = ALIGN(minify(mt->physical_height0, 1), mt->align_h);
    if (mt->array_spacing_lod0)
-      qpitch = h0;
+      mt->qpitch = h0;
    else
-      qpitch = (h0 + h1 + (brw->gen >= 7 ? 12 : 11) * mt->align_h);
+      mt->qpitch = (h0 + h1 + (brw->gen >= 7 ? 12 : 11) * mt->align_h);
    if (mt->compressed)
-      qpitch /= 4;
+      mt->qpitch /= 4;
 
    brw_miptree_layout_2d(mt);
 
    for (unsigned level = mt->first_level; level <= mt->last_level; level++) {
       for (int q = 0; q < mt->physical_depth0; q++) {
-	 intel_miptree_set_image_offset(mt, level, q, 0, q * qpitch);
+	 intel_miptree_set_image_offset(mt, level, q, 0, q * mt->qpitch);
       }
    }
-   mt->total_height = qpitch * mt->physical_depth0;
+   mt->total_height = mt->qpitch * mt->physical_depth0;
 
    align_cube(mt);
 }
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
index cde702c..329eeb0 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
@@ -334,6 +334,11 @@ struct intel_mipmap_tree
    bool array_spacing_lod0;
 
    /**
+    * The distance in rows between array slices.
+    */
+   uint32_t qpitch;
+
+   /**
     * MSAA layout used by this buffer.
     */
    enum intel_msaa_layout msaa_layout;




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