Mesa (master): i965: Emit a second set of SURFACE_STATE for gather4 from textures.
Chris Forbes
chrisf at kemper.freedesktop.org
Wed Oct 2 18:58:07 UTC 2013
Module: Mesa
Branch: master
Commit: c08f2083ee0c5d71351fe8eb9f41218a6fed7b10
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c08f2083ee0c5d71351fe8eb9f41218a6fed7b10
Author: Chris Forbes <chrisf at ijw.co.nz>
Date: Sun Sep 15 17:58:12 2013 +1200
i965: Emit a second set of SURFACE_STATE for gather4 from textures.
This allows us to use a different surface format for gather4, which is
required for R32G32_FLOAT to work on Gen7.
V4: - Only emit alternate surface state for shaders which will actually
use it.
- Pass a simple 'for_gather' flag rather than a function pointer.
The callee can decide what w/a to apply.
Signed-off-by: Chris Forbes <chrisf at ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
---
src/mesa/drivers/dri/i965/brw_context.h | 3 +-
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 38 +++++++++++++++++---
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 6 +++-
3 files changed, 39 insertions(+), 8 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 0d8c93e..c6e6655 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -928,7 +928,8 @@ struct brw_context
void (*update_texture_surface)(struct gl_context *ctx,
unsigned unit,
- uint32_t *surf_offset);
+ uint32_t *surf_offset,
+ bool for_gather);
void (*update_renderbuffer_surface)(struct brw_context *brw,
struct gl_renderbuffer *rb,
bool layered,
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 4c3eb69..6e91857 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -251,7 +251,8 @@ brw_update_buffer_texture_surface(struct gl_context *ctx,
static void
brw_update_texture_surface(struct gl_context *ctx,
unsigned unit,
- uint32_t *surf_offset)
+ uint32_t *surf_offset,
+ bool for_gather)
{
struct brw_context *brw = brw_context(ctx);
struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current;
@@ -268,6 +269,8 @@ brw_update_texture_surface(struct gl_context *ctx,
surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
6 * 4, 32, surf_offset);
+ (void) for_gather; /* no w/a to apply for this gen */
+
surf[0] = (translate_tex_target(tObj->Target) << BRW_SURFACE_TYPE_SHIFT |
BRW_SURFACE_MIPMAPLAYOUT_BELOW << BRW_SURFACE_MIPLAYOUT_SHIFT |
BRW_SURFACE_CUBEFACE_ENABLES |
@@ -712,7 +715,8 @@ const struct brw_tracked_state gen6_renderbuffer_surfaces = {
static void
update_stage_texture_surfaces(struct brw_context *brw,
const struct gl_program *prog,
- uint32_t *surf_offset)
+ uint32_t *surf_offset,
+ bool for_gather)
{
if (!prog)
return;
@@ -729,7 +733,7 @@ update_stage_texture_surfaces(struct brw_context *brw,
/* _NEW_TEXTURE */
if (ctx->Texture.Unit[unit]._ReallyEnabled) {
- brw->vtbl.update_texture_surface(ctx, unit, surf_offset + s);
+ brw->vtbl.update_texture_surface(ctx, unit, surf_offset + s, for_gather);
}
}
}
@@ -754,13 +758,35 @@ brw_update_texture_surfaces(struct brw_context *brw)
/* _NEW_TEXTURE */
update_stage_texture_surfaces(brw, vs,
brw->vs.base.surf_offset +
- SURF_INDEX_VEC4_TEXTURE(0));
+ SURF_INDEX_VEC4_TEXTURE(0),
+ false);
update_stage_texture_surfaces(brw, gs,
brw->gs.base.surf_offset +
- SURF_INDEX_VEC4_TEXTURE(0));
+ SURF_INDEX_VEC4_TEXTURE(0),
+ false);
update_stage_texture_surfaces(brw, fs,
brw->wm.base.surf_offset +
- SURF_INDEX_TEXTURE(0));
+ SURF_INDEX_TEXTURE(0),
+ false);
+
+ /* emit alternate set of surface state for gather. this
+ * allows the surface format to be overriden for only the
+ * gather4 messages. */
+ if (vs && vs->UsesGather)
+ update_stage_texture_surfaces(brw, vs,
+ brw->vs.base.surf_offset +
+ SURF_INDEX_VEC4_GATHER_TEXTURE(0),
+ true);
+ if (gs && gs->UsesGather)
+ update_stage_texture_surfaces(brw, gs,
+ brw->gs.base.surf_offset +
+ SURF_INDEX_VEC4_GATHER_TEXTURE(0),
+ true);
+ if (fs && fs->UsesGather)
+ update_stage_texture_surfaces(brw, fs,
+ brw->wm.base.surf_offset +
+ SURF_INDEX_GATHER_TEXTURE(0),
+ true);
brw->state.dirty.brw |= BRW_NEW_SURFACES;
}
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index 89c0055..7f934f8 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
@@ -299,7 +299,8 @@ gen7_update_buffer_texture_surface(struct gl_context *ctx,
static void
gen7_update_texture_surface(struct gl_context *ctx,
unsigned unit,
- uint32_t *surf_offset)
+ uint32_t *surf_offset,
+ bool for_gather)
{
struct brw_context *brw = brw_context(ctx);
struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current;
@@ -322,6 +323,9 @@ gen7_update_texture_surface(struct gl_context *ctx,
tObj->DepthMode,
sampler->sRGBDecode);
+ if (for_gather && tex_format == BRW_SURFACEFORMAT_R32G32_FLOAT)
+ tex_format = BRW_SURFACEFORMAT_R32G32_FLOAT_LD;
+
surf[0] = translate_tex_target(tObj->Target) << BRW_SURFACE_TYPE_SHIFT |
tex_format << BRW_SURFACE_FORMAT_SHIFT |
gen7_surface_tiling_mode(mt->region->tiling) |
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