Mesa (master): i965: make room in the binding table for a full alternate set of surface_states

[Chris Forbes]

Module: Mesa
Branch: master
Commit: 5901d48b4161ff64d5708e4e13122fce5ed4d0bf
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=5901d48b4161ff64d5708e4e13122fce5ed4d0bf

Author: Chris Forbes <chrisf at ijw.co.nz>
Date:   Sun Sep 15 18:11:37 2013 +1200

i965: make room in the binding table for a full alternate set of surface_states

Worst-case is that *every* texunit uses a format that needs overriding.

V4: Place the gather slots last, so shaders which don't use gather don't
    get penalized by having a huge binding table.

Signed-off-by: Chris Forbes <chrisf at ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

---

 src/mesa/drivers/dri/i965/brw_context.h |   20 ++++++++++++++++++--
 1 files changed, 18 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 0ec1218..0d8c93e 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -660,6 +660,13 @@ struct brw_gs_prog_data
  *    |   . |     .                   |
  *    |   : |     :                   |
  *    |  36 | UBO 11                  |
+ *    |-----|-------------------------|
+ *    |  37 | Shader time buffer      |
+ *    |-----|-------------------------|
+ *    |  38 | Gather texture 0        |
+ *    |   . |     .                   |
+ *    |   : |     :                   |
+ *    |  53 | Gather texture 15       |
  *    +-------------------------------+
  *
  * Our VS (and Gen7 GS) binding tables are programmed as follows:
@@ -676,6 +683,13 @@ struct brw_gs_prog_data
  *    |   . |     .                   |
  *    |   : |     :                   |
  *    |  28 | UBO 11                  |
+ *    |-----|-------------------------|
+ *    |  29 | Shader time buffer      |
+ *    |-----|-------------------------|
+ *    |  30 | Gather texture 0        |
+ *    |   . |     .                   |
+ *    |   : |     :                   |
+ *    |  45 | Gather texture 15       |
  *    +-------------------------------+
  *
  * Our (gen6) GS binding tables are programmed as follows:
@@ -692,14 +706,16 @@ struct brw_gs_prog_data
 #define SURF_INDEX_TEXTURE(t)        (BRW_MAX_DRAW_BUFFERS + 2 + (t))
 #define SURF_INDEX_WM_UBO(u)         (SURF_INDEX_TEXTURE(BRW_MAX_TEX_UNIT) + u)
 #define SURF_INDEX_WM_SHADER_TIME    (SURF_INDEX_WM_UBO(12))
+#define SURF_INDEX_GATHER_TEXTURE(t) (SURF_INDEX_WM_SHADER_TIME + 1 + (t))
 /** Maximum size of the binding table. */
-#define BRW_MAX_WM_SURFACES          (SURF_INDEX_WM_SHADER_TIME + 1)
+#define BRW_MAX_WM_SURFACES          (SURF_INDEX_GATHER_TEXTURE(BRW_MAX_TEX_UNIT))
 
 #define SURF_INDEX_VEC4_CONST_BUFFER (0)
 #define SURF_INDEX_VEC4_TEXTURE(t)   (SURF_INDEX_VEC4_CONST_BUFFER + 1 + (t))
 #define SURF_INDEX_VEC4_UBO(u)       (SURF_INDEX_VEC4_TEXTURE(BRW_MAX_TEX_UNIT) + u)
 #define SURF_INDEX_VEC4_SHADER_TIME  (SURF_INDEX_VEC4_UBO(12))
-#define BRW_MAX_VEC4_SURFACES        (SURF_INDEX_VEC4_SHADER_TIME + 1)
+#define SURF_INDEX_VEC4_GATHER_TEXTURE(t)   (SURF_INDEX_VEC4_SHADER_TIME + 1 + (t))
+#define BRW_MAX_VEC4_SURFACES        (SURF_INDEX_VEC4_GATHER_TEXTURE(BRW_MAX_TEX_UNIT))
 
 #define SURF_INDEX_GEN6_SOL_BINDING(t) (t)
 #define BRW_MAX_GEN6_GS_SURFACES       SURF_INDEX_GEN6_SOL_BINDING(BRW_MAX_SOL_BINDINGS)