Mesa (master): 27 new commits

Kenneth Graunke kwg at kemper.freedesktop.org
Thu Jun 26 18:47:24 UTC 2014


URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7c2946fc237616e60ed1d3bb284256a3d1183c79
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Thu Jun 26 11:19:15 2014 -0700

    i965: Disassemble all of DP write message control bits on Gen6.
    
    Prior to the new brw_inst API, the brw_instruction structure split off
    bits 4 and 5 of msg_control for specific fields, and we failed to
    disassemble them.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Matt Turner <mattst88 at gmail.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=40a975495343159bd73ee7325c748b56a2e792e1
Author: Matt Turner <mattst88 at gmail.com>
Date:   Mon Jun 16 16:34:57 2014 -0700

    i965: Pass brw to brw_try_compact_instruction().
    
    Signed-off-by: Matt Turner <mattst88 at gmail.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=fa1a3b2e3c2bdb358423ef960edddce3e3014ce6
Author: Matt Turner <mattst88 at gmail.com>
Date:   Sun Jun 15 11:15:30 2014 -0700

    i965: Add is_cherryview flag to brw_context.
    
    Signed-off-by: Matt Turner <mattst88 at gmail.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a25401bc9a1930b466a435febb2bc26dffe5693d
Author: Matt Turner <mattst88 at gmail.com>
Date:   Sun Jun 15 18:58:28 2014 -0700

    i965: Add CSEL opcode definition for Gen8.
    
    Signed-off-by: Matt Turner <mattst88 at gmail.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e1b477238dc6817b408fcd489d8935a6e0a79aef
Author: Matt Turner <mattst88 at gmail.com>
Date:   Fri Jun 13 20:50:45 2014 -0700

    i965: Document which instructions are generation specific.
    
    Signed-off-by: Matt Turner <mattst88 at gmail.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a382b4cb7aab046ce80140973f07bac71451b9ef
Author: Matt Turner <mattst88 at gmail.com>
Date:   Tue Jun 17 12:14:05 2014 -0700

    i965: Don't set UIP for ENDIF/WHILE.
    
    They don't have a UIP. We used UIP in an array dereference, which never
    caused problems on Gen < 8, since UIP was a small integer (number of
    instructions). On Gen 8 UIP is in bytes, so it's large enough that it
    caused us to read out of bounds of the array.
    
    Signed-off-by: Matt Turner <mattst88 at gmail.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=92233aee47a0c7debfd2db5242fa8792e4c9db07
Author: Matt Turner <mattst88 at gmail.com>
Date:   Fri Jun 13 16:16:28 2014 -0700

    i965: Replace struct brw_compact_instruction with brw_compact_inst.
    
    Signed-off-by: Matt Turner <mattst88 at gmail.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=eaf78e56af1c0617365288a71172a76c3852e52c
Author: Matt Turner <mattst88 at gmail.com>
Date:   Fri Jun 13 17:30:05 2014 -0700

    i965: Convert brw_eu_compact.c to the new brw_compact_inst API.
    
    Signed-off-by: Matt Turner <mattst88 at gmail.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=395c7597125c08730857135df6e79417433d551f
Author: Matt Turner <mattst88 at gmail.com>
Date:   Fri Jun 13 15:09:12 2014 -0700

    i965: Introduce a new brw_compact_inst API.
    
    For now nothing uses this, but we can incrementally convert.
    
    Signed-off-by: Matt Turner <mattst88 at gmail.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7c79608b5b8a7eb4bed9fa9d594c9bda696dd49a
Author: Matt Turner <mattst88 at gmail.com>
Date:   Fri Jun 13 14:29:25 2014 -0700

    i965: Replace 'struct brw_instruction' with 'brw_inst'.
    
    Use this an an opportunity to clean up the formatting of some old code
    (brw_ADD, for instance).
    
    Signed-off-by: Matt Turner <mattst88 at gmail.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=290daad497683c61938058bcb3244db11f0a966a
Author: Matt Turner <mattst88 at gmail.com>
Date:   Fri Jun 13 12:19:29 2014 -0700

    i965: Throw out guts of struct brw_instruction.
    
    Signed-off-by: Matt Turner <mattst88 at gmail.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a375092f5c1fd456ee5188e93aa7edbc005cc3bf
Author: Matt Turner <mattst88 at gmail.com>
Date:   Fri Jun 13 12:18:24 2014 -0700

    i965: Convert brw_gs_emit.c to the new brw_inst API.
    
    Signed-off-by: Matt Turner <mattst88 at gmail.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=bfbe6a7210b534fede5d5f24dc55dee9a78ef49b
Author: Matt Turner <mattst88 at gmail.com>
Date:   Thu Jun 12 16:26:22 2014 -0700

    i965: Convert brw_disasm.c to the new brw_inst API.
    
    v2: (by Kenneth Graunke)
     - Fix disassembly of Gen4-5 SEND messages to print base MRF correctly.
     - Only print URB opcode on Gen5+, to match previous output (besides,
       there is only one opcode AFAICT.)
     - Only print the low 3 bits of msg_control, to match previous output.
       (We probably should decode all the fields, but hadn't previously due
       to the brw_instruction structure definition splitting out bits 4/5
       for last_render_target and slot_group_select.)
     - Fix 3-source MRF/GRF file decoding on Sandybridge.
     - Fix compression code to use qtr_control rather than cmpt_control
       (which is compaction, not compression).
    
    Signed-off-by: Matt Turner <mattst88 at gmail.com>
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org> [v2]
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=1149eedffc1a996dded9cdc55096d409e48d707b
Author: Matt Turner <mattst88 at gmail.com>
Date:   Thu Jun 12 16:08:02 2014 -0700

    i965: Pass brw rather than gen to brw_disassemble_inst().
    
    We will need it in order to use the new brw_inst API.
    
    Signed-off-by: Matt Turner <mattst88 at gmail.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=9cbf899a7d61beda57c7ca1ea090c86f07f460a7
Author: Matt Turner <mattst88 at gmail.com>
Date:   Wed Jun 11 23:10:19 2014 -0700

    i965: Convert brw_eu_compact.c to the new brw_inst API.
    
    v2: Use brw_inst_bits rather than pulling out individual fields and
        reassembling them.
    
    Signed-off-by: Matt Turner <mattst88 at gmail.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=5e6818faa57b8572478a9993db3367d51a3af10c
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Sat Jun 7 23:52:37 2014 -0700

    i965: Extend is_haswell checks to gen >= 8 in Gen4-7 generators.
    
    We're going to use fs_generator/vec4_generator for Gen8+ code soon,
    thanks to the new brw_instruction API.  When we do, we'll generally
    want to take the Haswell paths on Gen8+ as well.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Matt Turner <mattst88 at gmail.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=45cc9ddcc14416eb53626cf26ba0e0047e23bec4
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Sat Jun 7 22:58:26 2014 -0700

    i965: Convert test_eu_compact.c to the new brw_inst API.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Matt Turner <mattst88 at gmail.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4362631d7b787837210c30ba0d89e1a034c57af8
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Sat Jun 7 22:46:59 2014 -0700

    i965: Convert vec4_generator to the new brw_inst API.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Matt Turner <mattst88 at gmail.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a041eb4030878f7b638432931b99fbb7d1823f39
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Sat Jun 7 22:44:24 2014 -0700

    i965: Convert fs_generator to the new brw_inst API.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Matt Turner <mattst88 at gmail.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=eedc5bbc69b051a6456563dda0db1890f8a6cea2
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Sat Jun 7 22:22:41 2014 -0700

    i965: Convert Gen4-5 clipping code to the new brw_inst API.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Matt Turner <mattst88 at gmail.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7213e1ddc7ae0fd2dac1bd297c9912841c228589
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Sat Jun 7 21:29:47 2014 -0700

    i965: Convert brw_sf_emit.c to the new brw_inst API.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Matt Turner <mattst88 at gmail.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=829aac4b6783a6e7667293a60d97947d277cfa39
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Wed Jun 4 17:08:57 2014 -0700

    i965: Convert brw_eu_emit.c to the new brw_inst API.
    
    v2:
     - Fix IF -> ELSE patching on Sandybridge.
     - Don't set base_mrf on Gen6+ in OWord Block Read functions.  (Although
     - the old code did this universally, it shouldn't have - the field
     - doesn't exist on Gen6+ and just got overwritten by the SFID anyway.)
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Matt Turner <mattst88 at gmail.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=607f5eb3819e6cc6262e5f6a866416e9aac7b827
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Sat Jun 7 21:24:41 2014 -0700

    i965: Convert brw_eu.[ch] to use the new brw_inst API.
    
    v2: Don't set flag_reg_nr prior to Gen7 (as it doesn't exist).
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Matt Turner <mattst88 at gmail.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=d49a9ca8c2d93036fe8187bd845339a34cb1f84e
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Wed Jun 4 17:07:30 2014 -0700

    i965: Introduce a new brw_inst API.
    
    This is similar to gen8_instruction, and will eventually replace it.
    
    For now nothing uses this, but we can incrementally convert.
    The new API takes the existing brw_instruction pointers to ease
    conversion; when done, we can simply drop the old structure and rename
    struct brw_instruction -> brw_inst.
    
    v2: (by Matt Turner) Make JIP/UIP functions take a signed argument.
    v3: (by Kenneth Graunke)
     - Make Gen4-6 jump target functions take a signed argument.
     - Fix indirect align1 AddrImm bits on Gen4-7.
     - Fix SFID on Sandybridge to use bits 27:24.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org> [v1, v3+]
    Signed-off-by: Matt Turner <mattst88 at gmail.com> [v2]
    Reviewed-by: Matt Turner <mattst88 at gmail.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=05040d6f8fcfdc4fb070c7ff24d3990ffede77f1
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Sat Jun 7 21:15:59 2014 -0700

    i965: Pass brw into next_offset().
    
    The new brw_inst API is going to require a brw pointer in order
    to access fields (so it can do generation checks).  Plumb it in now.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Matt Turner <mattst88 at gmail.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=890287b96bfa2cae9bc3b477ab1eac2062f663ba
Author: Greg Hunt <greg.hunt at mobica.com>
Date:   Wed Jun 25 14:42:24 2014 +0100

    i965: Remove unneeded VS workaround stalls on Baytrail.
    
    According to the workarounds list, these stalls aren't needed on
    production Baytrail systems.  Piglit confirms that as well.
    
    These cause a small slowdown when we are sending a large number of small
    batches to the GPU.  Removing these improves performance by up to 5% on
    some CPU bound SynMark tests (Batch[4-7], DrvState1, HdrBloom,
    Multithread, ShMapPcf).
    
    Signed-off-by: Gregory Hunt <greg.hunt at mobica.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=05126b9bb5763ab6a7418719e1ef2d660cc3c272
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Tue Jun 24 16:18:11 2014 -0700

    i965: Include marketing names for Broadwell GPUs.
    
    Intel would like us to include the marketing names.  Developers
    additionally want "Broadwell GT1/2/3" because it makes it easier
    to identify what hardware users have when they request assistance
    or report issues.
    
    Including both makes it easy for everyone to map between the names.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
    Cc: "10.2" <mesa-stable at lists.freedesktop.org>




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