Mesa (master): i965/gen9: Disable MCS for 1x color surfaces

[Chad Versace]

Module: Mesa
Branch: master
Commit: dcd59a9e322edeea74187bcad65a8e56c0bfaaa2
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=dcd59a9e322edeea74187bcad65a8e56c0bfaaa2

Author: Chad Versace <chad.versace at intel.com>
Date:   Thu Oct  8 11:53:08 2015 -0700

i965/gen9: Disable MCS for 1x color surfaces

Fast color clears are disabled for gen9 (see the checks in
brw_meta_fast_clear), so there is no reason to allocate the MCS and
track its clear/resolve state.

Reviewed-by: Neil Roberts <neil at linux.intel.com>

---

 src/mesa/drivers/dri/i965/intel_mipmap_tree.c |    8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index a169c41..b6e3520 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -201,6 +201,14 @@ intel_miptree_supports_non_msrt_fast_clear(struct brw_context *brw,
    if (brw->gen < 7)
       return false;
 
+   if (brw->gen >= 9) {
+      /* FINISHME: Enable singlesample fast MCS clears on SKL after all GPU
+       * FINISHME: hangs are resolved.
+       */
+      perf_debug("singlesample fast MCS clears disabled on gen9");
+      return false;
+   }
+
    if (mt->disable_aux_buffers)
       return false;