Mesa (master): i965/vec4: Use the correct offset for the swizzle shift in push constants

[Jason Ekstrand]

Module: Mesa
Branch: master
Commit: b3f43822c72301c904fd2824ae3edcd20ea93a29
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b3f43822c72301c904fd2824ae3edcd20ea93a29

Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Mon Apr 18 18:52:36 2016 -0700

i965/vec4: Use the correct offset for the swizzle shift in push constants

This was actually caught by Ken in review the first time around but somehow
didn't get fixed before the patches were pushed. :-(

Reviewed-by: Iago Toral Quiroga <itoral at igalia.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94998
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95001

---

 src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
index b5c23c9..aa3965a 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
@@ -712,7 +712,7 @@ vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr)
 
          unsigned offset = const_offset->u32[0] + shift * 4;
          src.reg_offset = offset / 16;
-         shift = (nir_intrinsic_base(instr) % 16) / 4;
+         shift = (offset % 16) / 4;
          src.swizzle += BRW_SWIZZLE4(shift, shift, shift, shift);
 
          emit(MOV(dest, src));